c50ed05cad
recreate this patch from https://github.com/llvm/llvm-project/pull/153894 It seems ISel sliently ignore the `i64 = zext i16` with a chained `reg_sequence` pattern and thus this is causing a selection failure in hip test. Recreate a new patch with an alternative pattern, and added a ll test global-extload-gfx11plus.ll
102 lines
6.4 KiB
LLVM
102 lines
6.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc %s -o %t.o -mcpu=gfx1030 -filetype=obj -O0
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; RUN: llvm-debuginfo-analyzer %t.o --print=all --attribute=all | FileCheck %s
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; This test compiles this module with AMDGPU backend under -O0,
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; and makes sure llvm-debuginfo-analyzer works for it.
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; Simple checks to make sure llvm-debuginfo-analzyer didn't fail early.
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; CHECK: Logical View:
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; CHECK: {CompileUnit}
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; CHECK-DAG: {Parameter} 'dtid' -> [0x{{[a-f0-9]+}}]'uint3'
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; CHECK-DAG: {Variable} 'my_var2' -> [0x{{[a-f0-9]+}}]'float'
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; CHECK-DAG: {Line} {{.+}}basic_var.hlsl
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; CHECK: {Code} 's_endpgm'
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source_filename = "module"
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target triple = "amdgcn-amd-amdpal"
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%dx.types.ResRet.f32 = type { float, float, float, float, i32 }
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define dllexport amdgpu_cs void @_amdgpu_cs_main(i32 inreg noundef %globalTable, i32 inreg noundef %userdata4, <3 x i32> inreg noundef %WorkgroupId, i32 inreg noundef %MultiDispatchInfo, <3 x i32> noundef %LocalInvocationId) #0 !dbg !14 {
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%LocalInvocationId.i0 = extractelement <3 x i32> %LocalInvocationId, i64 0, !dbg !28
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%WorkgroupId.i0 = extractelement <3 x i32> %WorkgroupId, i64 0, !dbg !28
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%pc = call i64 @llvm.amdgcn.s.getpc(), !dbg !28
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%offset = shl i32 %WorkgroupId.i0, 6, !dbg !28
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%dtid = add i32 %LocalInvocationId.i0, %offset, !dbg !28
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#dbg_value(i32 %dtid, !29, !DIExpression(DW_OP_LLVM_fragment, 0, 32), !28)
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%pc_hi = and i64 %pc, -4294967296, !dbg !30
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%zext = zext i32 %userdata4 to i64, !dbg !30
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%ptr_val = or disjoint i64 %pc_hi, %zext, !dbg !30
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%ptr = inttoptr i64 %ptr_val to ptr addrspace(4), !dbg !30
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call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) %ptr, i32 4), "dereferenceable"(ptr addrspace(4) %ptr, i32 -1) ], !dbg !30
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%uav_0 = load <4 x i32>, ptr addrspace(4) %ptr, align 4, !dbg !30, !invariant.load !2
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%uav_load_1 = call float @llvm.amdgcn.struct.buffer.load.format.f32(<4 x i32> %uav_0, i32 %dtid, i32 0, i32 0, i32 0), !dbg !30
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#dbg_value(%dx.types.ResRet.f32 poison, !31, !DIExpression(), !32)
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%mul = fmul reassoc arcp contract afn float %uav_load_1, 2.000000e+00, !dbg !33
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#dbg_value(float %mul, !34, !DIExpression(), !35)
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call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) %ptr, i32 4), "dereferenceable"(ptr addrspace(4) %ptr, i32 -1) ], !dbg !36
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%uav_1_ptr = getelementptr i8, ptr addrspace(4) %ptr, i64 32, !dbg !36
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%.upto01 = insertelement <4 x float> poison, float %mul, i64 0, !dbg !36
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%filled_vector = shufflevector <4 x float> %.upto01, <4 x float> poison, <4 x i32> zeroinitializer, !dbg !36
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%uav_1 = load <4 x i32>, ptr addrspace(4) %uav_1_ptr, align 4, !dbg !36, !invariant.load !2
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call void @llvm.amdgcn.struct.buffer.store.format.v4f32(<4 x float> %filled_vector, <4 x i32> %uav_1, i32 %dtid, i32 0, i32 0, i32 0), !dbg !36
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ret void, !dbg !37
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}
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declare noundef i64 @llvm.amdgcn.s.getpc() #1
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declare void @llvm.assume(i1 noundef) #2
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declare void @llvm.amdgcn.struct.buffer.store.format.v4f32(<4 x float>, <4 x i32>, i32, i32, i32, i32 immarg) #3
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declare float @llvm.amdgcn.struct.buffer.load.format.f32(<4 x i32>, i32, i32, i32, i32 immarg) #4
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attributes #0 = { memory(readwrite) }
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attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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attributes #2 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
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attributes #3 = { nocallback nofree nosync nounwind willreturn memory(write) }
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attributes #4 = { nocallback nofree nosync nounwind willreturn memory(read) }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!12, !13}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "dxcoob 1.7.2308.16 (52da17e29)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !3)
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!1 = !DIFile(filename: "tests\\basic_var.hlsl", directory: "")
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!2 = !{}
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!3 = !{!4, !10}
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!4 = distinct !DIGlobalVariableExpression(var: !5, expr: !DIExpression())
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!5 = !DIGlobalVariable(name: "u0", linkageName: "\01?u0@@3V?$RWBuffer@M@@A", scope: !0, file: !1, line: 2, type: !6, isLocal: false, isDefinition: true)
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!6 = !DICompositeType(tag: DW_TAG_class_type, name: "RWBuffer<float>", file: !1, line: 2, size: 32, align: 32, elements: !2, templateParams: !7)
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!7 = !{!8}
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!8 = !DITemplateTypeParameter(name: "element", type: !9)
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!9 = !DIBasicType(name: "float", size: 32, align: 32, encoding: DW_ATE_float)
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!10 = distinct !DIGlobalVariableExpression(var: !11, expr: !DIExpression())
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!11 = !DIGlobalVariable(name: "u1", linkageName: "\01?u1@@3V?$RWBuffer@M@@A", scope: !0, file: !1, line: 3, type: !6, isLocal: false, isDefinition: true)
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!12 = !{i32 2, !"Dwarf Version", i32 5}
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!13 = !{i32 2, !"Debug Info Version", i32 3}
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!14 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 7, type: !15, scopeLine: 7, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0)
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!15 = !DISubroutineType(types: !16)
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!16 = !{null, !17}
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!17 = !DIDerivedType(tag: DW_TAG_typedef, name: "uint3", file: !1, baseType: !18)
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!18 = !DICompositeType(tag: DW_TAG_class_type, name: "vector<unsigned int, 3>", file: !1, size: 96, align: 32, elements: !19, templateParams: !24)
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!19 = !{!20, !22, !23}
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!20 = !DIDerivedType(tag: DW_TAG_member, name: "x", scope: !18, file: !1, baseType: !21, size: 32, align: 32, flags: DIFlagPublic)
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!21 = !DIBasicType(name: "unsigned int", size: 32, align: 32, encoding: DW_ATE_unsigned)
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!22 = !DIDerivedType(tag: DW_TAG_member, name: "y", scope: !18, file: !1, baseType: !21, size: 32, align: 32, offset: 32, flags: DIFlagPublic)
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!23 = !DIDerivedType(tag: DW_TAG_member, name: "z", scope: !18, file: !1, baseType: !21, size: 32, align: 32, offset: 64, flags: DIFlagPublic)
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!24 = !{!25, !26}
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!25 = !DITemplateTypeParameter(name: "element", type: !21)
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!26 = !DITemplateValueParameter(name: "element_count", type: !27, value: i32 3)
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!27 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
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!28 = !DILocation(line: 7, column: 17, scope: !14)
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!29 = !DILocalVariable(name: "dtid", arg: 1, scope: !14, file: !1, line: 7, type: !17)
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!30 = !DILocation(line: 11, column: 18, scope: !14)
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!31 = !DILocalVariable(name: "my_var", scope: !14, file: !1, line: 11, type: !9)
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!32 = !DILocation(line: 11, column: 9, scope: !14)
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!33 = !DILocation(line: 14, column: 26, scope: !14)
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!34 = !DILocalVariable(name: "my_var2", scope: !14, file: !1, line: 14, type: !9)
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!35 = !DILocation(line: 14, column: 9, scope: !14)
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!36 = !DILocation(line: 17, column: 14, scope: !14)
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!37 = !DILocation(line: 19, column: 1, scope: !14)
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