896d900c9b
When performing a 64-bit sra of a negative value with a shift range from [32-63], create the hi-half with a move of -1. Alive verification: https://alive2.llvm.org/ce/z/kXd7Ac Also, preserve exact flag. Alive verification: https://alive2.llvm.org/ce/z/L86tXf. --------- Signed-off-by: John Lu <John.Lu@amd.com>
44 lines
2.1 KiB
LLVM
44 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -stop-after=finalize-isel -o - %s | FileCheck %s
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;; Test that reduction of:
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;;
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;; DST = ashr i64 X, Y
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;;
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;; where Y is in the range [63-32] to:
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;;
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;; DST = [ashr i32 HI(X), (Y & 0x1F), ashr i32 HI(X), 31]
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;;
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;; preserves flags
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define i64 @ashr_exact(i64 %arg0, i64 %shift_amt) {
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; CHECK-LABEL: name: ashr_exact
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; CHECK: bb.0 (%ir-block.0):
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; CHECK-NEXT: liveins: $vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF2:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE killed [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; CHECK-NEXT: [[DEF3:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF4:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF5:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[DEF3]]
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; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, killed [[COPY4]], %subreg.sub1
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; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]].sub0
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; CHECK-NEXT: [[V_ASHRREV_I32_e64_:%[0-9]+]]:vgpr_32 = exact V_ASHRREV_I32_e64 killed [[COPY5]], [[COPY3]], implicit $exec
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; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 31
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; CHECK-NEXT: [[V_ASHRREV_I32_e64_1:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e64 killed [[S_MOV_B32_]], [[COPY3]], implicit $exec
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; CHECK-NEXT: $vgpr0 = COPY [[V_ASHRREV_I32_e64_]]
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; CHECK-NEXT: $vgpr1 = COPY [[V_ASHRREV_I32_e64_1]]
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; CHECK-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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%or = or i64 %shift_amt, 32
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%ashr = ashr exact i64 %arg0, %or
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ret i64 %ashr
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}
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