e8e3e6e893
LiveVariables will mark instructions with their implicit subregister uses. However, it will also mark the subregister as an implicit if its own definition is a subregister of it, i.e. `$r3 = OP val, implicit-def $r0_r1_r2_r3, ..., implicit $r2_r3`, even if it is otherwise unused, which defines $r3 on the same line it is used. This change ensures such uses are marked without implicit, i.e. `$r3 = OP val, implicit-def $r0_r1_r2_r3, ..., $r2_r3`. --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
26 lines
976 B
LLVM
26 lines
976 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -O1 %s -o - | FileCheck %s
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define amdgpu_ps <4 x float> @caller(ptr %ptr) {
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; CHECK-LABEL: caller:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: flat_load_dword v1, v[0:1]
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; CHECK-NEXT: s_mov_b32 s0, 0
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; CHECK-NEXT: s_mov_b32 s1, 0
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; CHECK-NEXT: s_mov_b32 s2, 0
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; CHECK-NEXT: s_mov_b32 s5, fn@abs32@hi
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; CHECK-NEXT: s_mov_b32 s4, fn@abs32@lo
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; CHECK-NEXT: s_mov_b64 s[8:9], 0
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; CHECK-NEXT: v_mov_b32_e32 v0, 0
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; CHECK-NEXT: s_mov_b32 s3, 0
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; CHECK-NEXT: v_mov_b32_e32 v2, 0
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; CHECK-NEXT: s_mov_b32 s32, 0
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; CHECK-NEXT: s_swappc_b64 s[30:31], s[4:5]
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; CHECK-NEXT: ; return to shader part epilog
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%L = load i32, ptr %ptr, align 4
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%R = call <4 x float> @fn(<4 x i32> zeroinitializer, i32 0, i32 %L, i32 0)
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ret <4 x float> %R
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}
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declare hidden <4 x float> @fn(<4 x i32> inreg, i32, i32, i32)
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