llvm-project/llvm/test/CodeGen/AMDGPU/fold-cndmask.mir
Fangrui Song 9e9907f1cf
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
2024-01-16 21:54:58 -08:00

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# RUN: llc -mtriple=amdgcn -run-pass si-fold-operands -verify-machineinstrs -o - %s | FileCheck %s
# CHECK: %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
# CHECK: %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
# CHECK: %4:vgpr_32 = COPY %3
# CHECK: %6:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
# CHECK: %7:vgpr_32 = COPY %3
---
name: fold_cndmask
tracksRegLiveness: true
registers:
- { id: 0, class: sgpr_64 }
- { id: 1, class: vgpr_32 }
- { id: 2, class: vgpr_32 }
- { id: 3, class: vgpr_32 }
- { id: 4, class: vgpr_32 }
- { id: 5, class: vgpr_32 }
- { id: 6, class: vgpr_32 }
- { id: 7, class: vgpr_32 }
body: |
bb.0.entry:
%0 = IMPLICIT_DEF
%1 = V_CNDMASK_B32_e64 0, 0, 0, 0, %0, implicit $exec
%2 = V_CNDMASK_B32_e64 0, %1, 0, %1, %0, implicit $exec
%3 = IMPLICIT_DEF
%4 = V_CNDMASK_B32_e64 0, %3, 0, %3, %0, implicit $exec
%5 = COPY %1
%6 = V_CNDMASK_B32_e64 0, %5, 0, 0, %0, implicit $exec
$vcc = IMPLICIT_DEF
%7 = V_CNDMASK_B32_e32 %3, %3, implicit $exec, implicit $vcc
S_ENDPGM 0, implicit %1, implicit %2, implicit %4, implicit %6, implicit %7
...