llvm-project/llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -run-pass si-pre-emit-peephole -verify-machineinstrs  %s -o - | FileCheck %s

---
name: skip_waitcnt_vscnt
body: |
  ; CHECK-LABEL: name: skip_waitcnt_vscnt
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   V_NOP_e32 implicit $exec
  ; CHECK-NEXT:   S_WAITCNT_VSCNT $sgpr_null, 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1, %bb.2
    S_CBRANCH_EXECZ %bb.2, implicit $exec

  bb.1:
    successors: %bb.2
    V_NOP_e32 implicit $exec
    S_WAITCNT_VSCNT $sgpr_null, 0

  bb.2:
    S_ENDPGM 0
...

---
name: skip_waitcnt_expcnt
body: |
  ; CHECK-LABEL: name: skip_waitcnt_expcnt
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   V_NOP_e32 implicit $exec
  ; CHECK-NEXT:   S_WAITCNT_EXPCNT $sgpr_null, 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1, %bb.2
    S_CBRANCH_EXECZ %bb.2, implicit $exec

  bb.1:
    successors: %bb.2
    V_NOP_e32 implicit $exec
    S_WAITCNT_EXPCNT $sgpr_null, 0

  bb.2:
    S_ENDPGM 0
...

---
name: skip_waitcnt_vmcnt
body: |
  ; CHECK-LABEL: name: skip_waitcnt_vmcnt
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   V_NOP_e32 implicit $exec
  ; CHECK-NEXT:   S_WAITCNT_VMCNT $sgpr_null, 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1, %bb.2
    S_CBRANCH_EXECZ %bb.2, implicit $exec

  bb.1:
    successors: %bb.2
    V_NOP_e32 implicit $exec
    S_WAITCNT_VMCNT $sgpr_null, 0

  bb.2:
    S_ENDPGM 0
...

---
name: skip_waitcnt_lgkmcnt
body: |
  ; CHECK-LABEL: name: skip_waitcnt_lgkmcnt
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   V_NOP_e32 implicit $exec
  ; CHECK-NEXT:   S_WAITCNT_LGKMCNT $sgpr_null, 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1, %bb.2
    S_CBRANCH_EXECZ %bb.2, implicit $exec

  bb.1:
    successors: %bb.2
    V_NOP_e32 implicit $exec
    S_WAITCNT_LGKMCNT $sgpr_null, 0

  bb.2:
    S_ENDPGM 0
...

---
name: skip_wait_idle
body: |
  ; CHECK-LABEL: name: skip_wait_idle
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   V_NOP_e32 implicit $exec
  ; CHECK-NEXT:   S_WAIT_IDLE
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1, %bb.2
    S_CBRANCH_EXECZ %bb.2, implicit $exec

  bb.1:
    successors: %bb.2
    V_NOP_e32 implicit $exec
    S_WAIT_IDLE

  bb.2:
    S_ENDPGM 0
...

---
name: skip_bvh
body: |
  ; CHECK-LABEL: name: skip_bvh
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   V_NOP_e32 implicit $exec
  ; CHECK-NEXT:   $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14 = IMPLICIT_DEF
  ; CHECK-NEXT:   $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
  ; CHECK-NEXT:   $vgpr0_vgpr1_vgpr2_vgpr3 = IMAGE_BVH_INTERSECT_RAY_sa_gfx11 $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, implicit $exec :: (dereferenceable load (s128), addrspace 7)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1, %bb.2
    S_CBRANCH_EXECZ %bb.2, implicit $exec

  bb.1:
    successors: %bb.2
    V_NOP_e32 implicit $exec
    $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14 = IMPLICIT_DEF
    $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
    $vgpr0_vgpr1_vgpr2_vgpr3 = IMAGE_BVH_INTERSECT_RAY_sa_gfx11 $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, implicit $exec :: (dereferenceable load (s128), addrspace 7)

  bb.2:
    S_ENDPGM 0
...

---
name: skip_barrier
body: |
  ; CHECK-LABEL: name: skip_barrier
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   V_NOP_e32 implicit $exec
  ; CHECK-NEXT:   S_BARRIER
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1, %bb.2
    S_CBRANCH_EXECZ %bb.2, implicit $exec

  bb.1:
    successors: %bb.2
    V_NOP_e32 implicit $exec
    S_BARRIER

  bb.2:
    S_ENDPGM 0
...