e8e3e6e893
LiveVariables will mark instructions with their implicit subregister uses. However, it will also mark the subregister as an implicit if its own definition is a subregister of it, i.e. `$r3 = OP val, implicit-def $r0_r1_r2_r3, ..., implicit $r2_r3`, even if it is otherwise unused, which defines $r3 on the same line it is used. This change ensures such uses are marked without implicit, i.e. `$r3 = OP val, implicit-def $r0_r1_r2_r3, ..., $r2_r3`. --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
92 lines
2.8 KiB
YAML
92 lines
2.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=amdgcn --run-pass=livevars -o - %s | FileCheck %s
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---
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# Check that super register is defined for an sgpr copy.
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name: sgpr_copy
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: sgpr_copy
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; CHECK: %sval:sreg_32 = S_MOV_B32 0
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; CHECK-NEXT: $sgpr0 = COPY %sval
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; CHECK-NEXT: $sgpr1 = COPY %sval
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; CHECK-NEXT: $sgpr2 = COPY %sval
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; CHECK-NEXT: $sgpr3 = COPY killed %sval
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; CHECK-NEXT: SI_RETURN implicit killed $sgpr0_sgpr1_sgpr2_sgpr3
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%sval:sreg_32 = S_MOV_B32 0
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$sgpr0 = COPY %sval
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$sgpr1 = COPY %sval
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$sgpr2 = COPY %sval
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$sgpr3 = COPY %sval
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SI_RETURN implicit $sgpr0_sgpr1_sgpr2_sgpr3
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...
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---
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# Check that super register is defined for a vgpr vector copy.
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name: vgpr_copy
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: vgpr_copy
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; CHECK: %vval:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: $vgpr0 = COPY %vval
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; CHECK-NEXT: $vgpr1 = COPY %vval
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; CHECK-NEXT: $vgpr2 = COPY %vval
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; CHECK-NEXT: $vgpr3 = COPY killed %vval
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; CHECK-NEXT: dead [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3
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%vval:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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$vgpr0 = COPY %vval
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$vgpr1 = COPY %vval
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$vgpr2 = COPY %vval
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$vgpr3 = COPY %vval
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%0:vgpr_32 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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...
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---
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# Check that super register is defined when there is a hole.
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name: sgpr_copy_hole
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: sgpr_copy_hole
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; CHECK: %sval:sreg_32 = S_MOV_B32 0
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; CHECK-NEXT: $sgpr0 = COPY %sval
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; CHECK-NEXT: $sgpr2 = COPY %sval
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; CHECK-NEXT: $sgpr3 = COPY killed %sval
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; CHECK-NEXT: SI_RETURN implicit killed $sgpr0_sgpr1_sgpr2_sgpr3
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%sval:sreg_32 = S_MOV_B32 0
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$sgpr0 = COPY %sval
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$sgpr2 = COPY %sval
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$sgpr3 = COPY %sval
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SI_RETURN implicit $sgpr0_sgpr1_sgpr2_sgpr3
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...
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---
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# Check that super register is defined when a pair interrupts the sequence.
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name: vgpr_copy_pair
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: vgpr_copy_pair
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; CHECK: %vval:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: $vgpr0 = COPY %vval
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; CHECK-NEXT: $vgpr1 = COPY %vval
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; CHECK-NEXT: $vgpr2 = COPY %vval
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; CHECK-NEXT: $vgpr3 = COPY killed %vval
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; CHECK-NEXT: dead [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1_vgpr2
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; CHECK-NEXT: dead [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3
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%vval:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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$vgpr0 = COPY %vval
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$vgpr1 = COPY %vval
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$vgpr2 = COPY %vval
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$vgpr3 = COPY %vval
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%0:vgpr_32 = COPY $vgpr1_vgpr2
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%1:vgpr_32 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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...
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