fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
337 lines
13 KiB
LLVM
337 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12 %s
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define amdgpu_ps void @store_f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_f32_1d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_f32_1d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_f32_1d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_f32_1d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 1, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v2f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_v2f32_1d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v2f32_1d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v2f32_1d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v2f32_1d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_1D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 3, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v3f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_v3f32_1d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v3f32_1d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v3f32_1d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v3f32_1d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_1D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 7, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v4f32_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_v4f32_1d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v4f32_1d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v4f32_1d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v4f32_1d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %val, i32 15, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_f32_2d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_f32_2d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_f32_2d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_f32_2d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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%y = extractelement <2 x i16> %coords, i32 1
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call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 1, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v2f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_v2f32_2d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v2f32_2d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v2f32_2d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v2f32_2d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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%y = extractelement <2 x i16> %coords, i32 1
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call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 3, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v3f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_v3f32_2d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v3f32_2d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v3f32_2d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v3f32_2d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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%y = extractelement <2 x i16> %coords, i32 1
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call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 7, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v4f32_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords, <4 x float> %val) {
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; GFX9-LABEL: store_v4f32_2d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v4f32_2d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v4f32_2d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v4f32_2d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[1:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords, i32 0
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%y = extractelement <2 x i16> %coords, i32 1
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call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %val, i32 15, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
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; GFX9-LABEL: store_f32_3d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x1 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_f32_3d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_3D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_f32_3d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_3D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_f32_3d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_3D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords_lo, i32 0
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%y = extractelement <2 x i16> %coords_lo, i32 1
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%z = extractelement <2 x i16> %coords_hi, i32 0
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call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 1, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v2f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
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; GFX9-LABEL: store_v2f32_3d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x3 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v2f32_3d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_3D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v2f32_3d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_3D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v2f32_3d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_3D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords_lo, i32 0
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%y = extractelement <2 x i16> %coords_lo, i32 1
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%z = extractelement <2 x i16> %coords_hi, i32 0
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call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 3, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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}
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define amdgpu_ps void @store_v3f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
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; GFX9-LABEL: store_v3f32_3d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x7 unorm a16
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: store_v3f32_3d:
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; GFX10: ; %bb.0: ; %main_body
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; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_3D unorm a16
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: store_v3f32_3d:
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; GFX11: ; %bb.0: ; %main_body
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; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_3D unorm a16
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; GFX11-NEXT: s_endpgm
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;
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; GFX12-LABEL: store_v3f32_3d:
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; GFX12: ; %bb.0: ; %main_body
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; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_3D a16
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; GFX12-NEXT: s_endpgm
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main_body:
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%x = extractelement <2 x i16> %coords_lo, i32 0
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%y = extractelement <2 x i16> %coords_lo, i32 1
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%z = extractelement <2 x i16> %coords_hi, i32 0
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call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 7, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
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ret void
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|
}
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|
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|
define amdgpu_ps void @store_v4f32_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi, <4 x float> %val) {
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; GFX9-LABEL: store_v4f32_3d:
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; GFX9: ; %bb.0: ; %main_body
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; GFX9-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0xf unorm a16
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|
; GFX9-NEXT: s_endpgm
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|
;
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|
; GFX10-LABEL: store_v4f32_3d:
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|
; GFX10: ; %bb.0: ; %main_body
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|
; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
|
|
; GFX10-NEXT: s_endpgm
|
|
;
|
|
; GFX11-LABEL: store_v4f32_3d:
|
|
; GFX11: ; %bb.0: ; %main_body
|
|
; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
|
|
; GFX11-NEXT: s_endpgm
|
|
;
|
|
; GFX12-LABEL: store_v4f32_3d:
|
|
; GFX12: ; %bb.0: ; %main_body
|
|
; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D a16
|
|
; GFX12-NEXT: s_endpgm
|
|
main_body:
|
|
%x = extractelement <2 x i16> %coords_lo, i32 0
|
|
%y = extractelement <2 x i16> %coords_lo, i32 1
|
|
%z = extractelement <2 x i16> %coords_hi, i32 0
|
|
call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %val, i32 15, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float>, i32, i16, <8 x i32>, i32, i32) #2
|
|
declare void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #2
|
|
declare void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #2
|
|
|
|
attributes #0 = { nounwind }
|
|
attributes #1 = { nounwind readonly }
|