llvm-project/llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
Shilei Tian d46de86ca4
[NFC][AMDGPU] Re-enable two tests previously disabled due to missing upstream features (#149568)
This PR re-enables two tests that were previously disabled because they
depended on features not yet upstreamed.
2025-07-18 17:04:34 -04:00

107 lines
4.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-TRUE16 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-FAKE16 %s
declare bfloat @llvm.sqrt.bf16(bfloat %a)
declare <2 x bfloat> @llvm.sqrt.v2bf16(<2 x bfloat> %a)
define amdgpu_kernel void @sqrt_bf16(ptr addrspace(1) %r, ptr addrspace(1) %a) {
; GFX12-TRUE16-LABEL: sqrt_bf16:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s10, s6
; GFX12-TRUE16-NEXT: s_mov_b32 s11, s7
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s3
; GFX12-TRUE16-NEXT: s_mov_b32 s4, s0
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_mov_b32 s5, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_sqrt_bf16_e32 v0.l, v0.l
; GFX12-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: sqrt_bf16:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s6, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s10, s6
; GFX12-FAKE16-NEXT: s_mov_b32 s11, s7
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s3
; GFX12-FAKE16-NEXT: s_mov_b32 s4, s0
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_mov_b32 s5, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_sqrt_bf16_e32 v0, v0
; GFX12-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: s_endpgm
entry:
%a.val = load bfloat, ptr addrspace(1) %a
%r.val = call bfloat @llvm.sqrt.bf16(bfloat %a.val)
store bfloat %r.val, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @sqrt_v2bf16(ptr addrspace(1) %r, ptr addrspace(1) %a) {
; GFX12-TRUE16-LABEL: sqrt_v2bf16:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s6, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s10, s6
; GFX12-TRUE16-NEXT: s_mov_b32 s11, s7
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s3
; GFX12-TRUE16-NEXT: s_mov_b32 s4, s0
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_mov_b32 s5, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_sqrt_bf16_e32 v1.l, v0.l
; GFX12-TRUE16-NEXT: v_nop
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_2)
; GFX12-TRUE16-NEXT: v_sqrt_bf16_e32 v0.l, v0.l
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshl_or_b32 v0, v0, 16, v1
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: sqrt_v2bf16:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s6, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s10, s6
; GFX12-FAKE16-NEXT: s_mov_b32 s11, s7
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s3
; GFX12-FAKE16-NEXT: s_mov_b32 s4, s0
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_mov_b32 s5, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_sqrt_bf16_e32 v1, v0
; GFX12-FAKE16-NEXT: v_nop
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_2)
; GFX12-FAKE16-NEXT: v_sqrt_bf16_e32 v0, v0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX12-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, v1
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: s_endpgm
entry:
%a.val = load <2 x bfloat>, ptr addrspace(1) %a
%r.val = call <2 x bfloat> @llvm.sqrt.v2bf16(<2 x bfloat> %a.val)
store <2 x bfloat> %r.val, ptr addrspace(1) %r
ret void
}