fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
282 lines
12 KiB
LLVM
282 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=SI %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck -check-prefixes=VI %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-TRUE16 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-FAKE16 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-TRUE16 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-FAKE16 %s
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declare half @llvm.sqrt.f16(half %a)
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declare <2 x half> @llvm.sqrt.v2f16(<2 x half> %a)
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define amdgpu_kernel void @sqrt_f16(
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; SI-LABEL: sqrt_f16:
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; SI: ; %bb.0: ; %entry
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; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
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; SI-NEXT: s_mov_b32 s7, 0xf000
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; SI-NEXT: s_mov_b32 s6, -1
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; SI-NEXT: s_mov_b32 s10, s6
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; SI-NEXT: s_mov_b32 s11, s7
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b32 s8, s2
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; SI-NEXT: s_mov_b32 s9, s3
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; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0
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; SI-NEXT: s_mov_b32 s4, s0
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; SI-NEXT: s_mov_b32 s5, s1
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
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; SI-NEXT: v_sqrt_f32_e32 v0, v0
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; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
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; SI-NEXT: buffer_store_short v0, off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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; VI-LABEL: sqrt_f16:
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; VI: ; %bb.0: ; %entry
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; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; VI-NEXT: s_mov_b32 s7, 0xf000
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; VI-NEXT: s_mov_b32 s6, -1
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; VI-NEXT: s_mov_b32 s10, s6
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; VI-NEXT: s_mov_b32 s11, s7
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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; VI-NEXT: s_mov_b32 s8, s2
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; VI-NEXT: s_mov_b32 s9, s3
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; VI-NEXT: buffer_load_ushort v0, off, s[8:11], 0
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; VI-NEXT: s_mov_b32 s4, s0
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; VI-NEXT: s_mov_b32 s5, s1
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; VI-NEXT: s_waitcnt vmcnt(0)
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; VI-NEXT: v_sqrt_f16_e32 v0, v0
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; VI-NEXT: buffer_store_short v0, off, s[4:7], 0
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; VI-NEXT: s_endpgm
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;
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; GFX11-TRUE16-LABEL: sqrt_f16:
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; GFX11-TRUE16: ; %bb.0: ; %entry
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; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
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; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6
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; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7
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; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2
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; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3
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; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0
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; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0
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; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: v_sqrt_f16_e32 v0.l, v0.l
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; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0
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; GFX11-TRUE16-NEXT: s_endpgm
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;
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; GFX11-FAKE16-LABEL: sqrt_f16:
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; GFX11-FAKE16: ; %bb.0: ; %entry
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; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1
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; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6
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; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7
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; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2
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; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3
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; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0
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; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0
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; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: v_sqrt_f16_e32 v0, v0
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; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0
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; GFX11-FAKE16-NEXT: s_endpgm
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;
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; GFX12-TRUE16-LABEL: sqrt_f16:
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; GFX12-TRUE16: ; %bb.0: ; %entry
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; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-TRUE16-NEXT: s_mov_b32 s6, -1
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; GFX12-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX12-TRUE16-NEXT: s_mov_b32 s10, s6
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; GFX12-TRUE16-NEXT: s_mov_b32 s11, s7
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; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
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; GFX12-TRUE16-NEXT: s_mov_b32 s8, s2
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; GFX12-TRUE16-NEXT: s_mov_b32 s9, s3
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; GFX12-TRUE16-NEXT: s_mov_b32 s4, s0
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; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[8:11], null
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; GFX12-TRUE16-NEXT: s_mov_b32 s5, s1
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; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
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; GFX12-TRUE16-NEXT: v_sqrt_f16_e32 v0.l, v0.l
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; GFX12-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
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; GFX12-TRUE16-NEXT: s_endpgm
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;
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; GFX12-FAKE16-LABEL: sqrt_f16:
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; GFX12-FAKE16: ; %bb.0: ; %entry
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; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-FAKE16-NEXT: s_mov_b32 s6, -1
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; GFX12-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX12-FAKE16-NEXT: s_mov_b32 s10, s6
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; GFX12-FAKE16-NEXT: s_mov_b32 s11, s7
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; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
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; GFX12-FAKE16-NEXT: s_mov_b32 s8, s2
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; GFX12-FAKE16-NEXT: s_mov_b32 s9, s3
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; GFX12-FAKE16-NEXT: s_mov_b32 s4, s0
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; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], null
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; GFX12-FAKE16-NEXT: s_mov_b32 s5, s1
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; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
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; GFX12-FAKE16-NEXT: v_sqrt_f16_e32 v0, v0
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; GFX12-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], null
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; GFX12-FAKE16-NEXT: s_endpgm
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ptr addrspace(1) %r,
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ptr addrspace(1) %a) {
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entry:
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%a.val = load half, ptr addrspace(1) %a
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%r.val = call half @llvm.sqrt.f16(half %a.val)
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store half %r.val, ptr addrspace(1) %r
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ret void
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}
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; The original test with manual checks also had these NOT directives:
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; COM: SI-DAG: v_lshlrev_b32_e32 v[[R_F16_HI:[0-9]+]], 16, v[[R_F16_1]]
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; COM: SI-NOT: v_and_b32
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; COM: SI: v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_HI]]
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; COM: VI-DAG: v_sqrt_f16_sdwa v[[R_F16_1:[0-9]+]], v[[A_V2_F16]] dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1
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; COM: VI-NOT: v_and_b32
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; COM: VI: v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_1]]
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define amdgpu_kernel void @sqrt_v2f16(
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; SI-LABEL: sqrt_v2f16:
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; SI: ; %bb.0: ; %entry
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; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
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; SI-NEXT: s_mov_b32 s7, 0xf000
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; SI-NEXT: s_mov_b32 s6, -1
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; SI-NEXT: s_mov_b32 s10, s6
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; SI-NEXT: s_mov_b32 s11, s7
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b32 s8, s2
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; SI-NEXT: s_mov_b32 s9, s3
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; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0
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; SI-NEXT: s_mov_b32 s4, s0
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; SI-NEXT: s_mov_b32 s5, s1
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
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; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
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; SI-NEXT: v_sqrt_f32_e32 v1, v1
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; SI-NEXT: v_sqrt_f32_e32 v0, v0
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; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
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; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
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; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
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; SI-NEXT: v_or_b32_e32 v0, v0, v1
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; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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; VI-LABEL: sqrt_v2f16:
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; VI: ; %bb.0: ; %entry
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; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; VI-NEXT: s_mov_b32 s7, 0xf000
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; VI-NEXT: s_mov_b32 s6, -1
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; VI-NEXT: s_mov_b32 s10, s6
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; VI-NEXT: s_mov_b32 s11, s7
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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; VI-NEXT: s_mov_b32 s8, s2
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; VI-NEXT: s_mov_b32 s9, s3
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; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
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; VI-NEXT: s_mov_b32 s4, s0
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; VI-NEXT: s_mov_b32 s5, s1
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; VI-NEXT: s_waitcnt vmcnt(0)
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; VI-NEXT: v_sqrt_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1
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; VI-NEXT: v_sqrt_f16_e32 v0, v0
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; VI-NEXT: v_or_b32_e32 v0, v0, v1
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; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
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; VI-NEXT: s_endpgm
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;
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; GFX11-TRUE16-LABEL: sqrt_v2f16:
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; GFX11-TRUE16: ; %bb.0: ; %entry
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; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
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; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6
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; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7
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; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2
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; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3
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; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0
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; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[8:11], 0
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; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX11-TRUE16-NEXT: v_sqrt_f16_e32 v0.l, v0.l
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-TRUE16-NEXT: v_sqrt_f16_e32 v0.h, v1.l
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; GFX11-TRUE16-NEXT: s_waitcnt_depctr 0xfff
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; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
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; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0
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; GFX11-TRUE16-NEXT: s_endpgm
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;
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; GFX11-FAKE16-LABEL: sqrt_v2f16:
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; GFX11-FAKE16: ; %bb.0: ; %entry
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; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1
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; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6
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; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7
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; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2
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; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3
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; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0
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; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[8:11], 0
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; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX11-FAKE16-NEXT: v_sqrt_f16_e32 v0, v0
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-FAKE16-NEXT: v_sqrt_f16_e32 v1, v1
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; GFX11-FAKE16-NEXT: s_waitcnt_depctr 0xfff
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; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
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; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0
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; GFX11-FAKE16-NEXT: s_endpgm
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;
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; GFX12-TRUE16-LABEL: sqrt_v2f16:
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; GFX12-TRUE16: ; %bb.0: ; %entry
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; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-TRUE16-NEXT: s_mov_b32 s6, -1
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; GFX12-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX12-TRUE16-NEXT: s_mov_b32 s10, s6
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; GFX12-TRUE16-NEXT: s_mov_b32 s11, s7
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; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
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; GFX12-TRUE16-NEXT: s_mov_b32 s8, s2
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; GFX12-TRUE16-NEXT: s_mov_b32 s9, s3
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; GFX12-TRUE16-NEXT: s_mov_b32 s4, s0
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; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[8:11], null
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; GFX12-TRUE16-NEXT: s_mov_b32 s5, s1
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; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
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; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX12-TRUE16-NEXT: v_sqrt_f16_e32 v0.l, v0.l
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; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
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; GFX12-TRUE16-NEXT: v_sqrt_f16_e32 v0.h, v1.l
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; GFX12-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
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; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], null
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; GFX12-TRUE16-NEXT: s_endpgm
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;
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; GFX12-FAKE16-LABEL: sqrt_v2f16:
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; GFX12-FAKE16: ; %bb.0: ; %entry
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; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-FAKE16-NEXT: s_mov_b32 s6, -1
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; GFX12-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
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; GFX12-FAKE16-NEXT: s_mov_b32 s10, s6
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; GFX12-FAKE16-NEXT: s_mov_b32 s11, s7
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; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
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; GFX12-FAKE16-NEXT: s_mov_b32 s8, s2
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; GFX12-FAKE16-NEXT: s_mov_b32 s9, s3
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; GFX12-FAKE16-NEXT: s_mov_b32 s4, s0
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; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[8:11], null
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; GFX12-FAKE16-NEXT: s_mov_b32 s5, s1
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; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
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; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX12-FAKE16-NEXT: v_sqrt_f16_e32 v0, v0
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; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
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; GFX12-FAKE16-NEXT: v_sqrt_f16_e32 v1, v1
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; GFX12-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
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; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], null
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; GFX12-FAKE16-NEXT: s_endpgm
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ptr addrspace(1) %r,
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ptr addrspace(1) %a) {
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entry:
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%a.val = load <2 x half>, ptr addrspace(1) %a
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%r.val = call <2 x half> @llvm.sqrt.v2f16(<2 x half> %a.val)
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store <2 x half> %r.val, ptr addrspace(1) %r
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ret void
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}
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