fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
45 lines
2.0 KiB
LLVM
45 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds < %s --amdgpu-lower-module-lds-strategy=module | FileCheck -check-prefix=OPT %s
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; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s --amdgpu-lower-module-lds-strategy=module | FileCheck -check-prefix=OPT %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s --amdgpu-lower-module-lds-strategy=module | FileCheck -check-prefix=GCN %s
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; Check that module LDS is allocated at address 0 and kernel starts its
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; allocation past module LDS when a call is present.
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@lds.size.1.align.1 = internal unnamed_addr addrspace(3) global [1 x i8] poison, align 1
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@lds.size.16.align.16 = internal unnamed_addr addrspace(3) global [16 x i8] poison, align 16
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; GCN-LABEL: {{^}}f0:
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; GCN-DAG: v_mov_b32_e32 [[NULL:v[0-9]+]], 0
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; GCN-DAG: v_mov_b32_e32 [[TREE:v[0-9]+]], 3
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; GCN: ds_write_b8 [[NULL]], [[TREE]]
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define void @f0() {
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; OPT-LABEL: @f0() {
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; OPT-NEXT: store i8 3, ptr addrspace(3) @llvm.amdgcn.module.lds, align 1
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; OPT-NEXT: ret void
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;
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store i8 3, ptr addrspace(3) @lds.size.1.align.1, align 1
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ret void
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}
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; GCN-LABEL: {{^}}k0:
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; GCN-DAG: v_mov_b32_e32 [[NULL:v[0-9]+]], 0
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; GCN-DAG: v_mov_b32_e32 [[ONE:v[0-9]+]], 1
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; GCN: ds_write_b8 [[NULL]], [[ONE]]
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; GCN: v_mov_b32_e32 [[TWO:v[0-9]+]], 2
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; GCN: ds_write_b8 [[NULL]], [[TWO]] offset:16
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define amdgpu_kernel void @k0() {
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; OPT-LABEL: @k0(
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; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k0.lds) ]
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; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]
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; OPT-NEXT: store i8 1, ptr addrspace(3) @llvm.amdgcn.module.lds, align 1
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; OPT-NEXT: store i8 2, ptr addrspace(3) @llvm.amdgcn.kernel.k0.lds, align 16
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; OPT-NEXT: call void @f0()
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; OPT-NEXT: ret void
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;
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store i8 1, ptr addrspace(3) @lds.size.1.align.1, align 1
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store i8 2, ptr addrspace(3) @lds.size.16.align.16, align 16
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call void @f0()
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ret void
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}
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