9c58f3a234
MIParser checks that implicit operands match the instruction definition, so they have to be $vcc even in wave32 mode. Use the mirFileLoaded hook to fix them after MIParser's checks, converting them to $vcc_lo which is what that rest of CodeGen expects. This is all just extending the fixImplicitOperands hack which was introduced with GFX10, but at least it makes it possible to write a MIR test which creates the same instructions that normal CodeGen would generate.
363 lines
11 KiB
YAML
363 lines
11 KiB
YAML
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra -o - %s | FileCheck -check-prefix=GCN %s
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra -o - %s | FileCheck -check-prefix=GCN %s
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# GCN: name: negated_cond_vop2
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, %0, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop2
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec
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$vcc_lo = S_AND_B32 $exec_lo, killed $vcc_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, %0, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop2_redef_vcc1
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc_lo, implicit $exec
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# GCN-NEXT: $vcc_lo = COPY $sgpr0
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# GCN-NEXT: $vcc_lo = S_AND_B32 $exec_lo, $vcc_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop2_redef_vcc1
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec
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$vcc_lo = COPY $sgpr0
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$vcc_lo = S_AND_B32 $exec_lo, killed $vcc_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_redef_cmp
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: dead %3:sgpr_32 = V_CMP_NE_U32_e64 %1, 1, implicit $exec
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# GCN-NEXT: %2:sgpr_32 = COPY $sgpr0
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# GCN-NEXT: $vcc_lo = S_AND_B32 %2, $exec_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_redef_cmp
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1, 1, implicit $exec
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%2 = COPY $sgpr0
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_undef_vcc
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# GCN: $vcc_lo = S_AND_B32 $exec_lo, undef $vcc_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_undef_vcc
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body: |
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bb.0:
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$vcc_lo = S_AND_B32 $exec_lo, undef $vcc_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_imp_vcc
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# GCN: $vcc_lo = IMPLICIT_DEF
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, $vcc_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_imp_vcc
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body: |
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bb.0:
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$vcc_lo = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $vcc_lo, implicit $exec
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop2_imp_vcc
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# GCN: $vcc_lo = IMPLICIT_DEF
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, $vcc_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop2_imp_vcc
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body: |
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bb.0:
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$vcc_lo = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $vcc_lo, implicit $exec
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V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec
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$vcc_lo = S_AND_B32 killed $vcc_lo, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_redef_sel
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: dead %3:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: %1:vgpr_32 = COPY $vgpr0
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# GCN-NEXT: %2:sgpr_32 = V_CMP_NE_U32_e64 %1, 1, implicit $exec
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# GCN-NEXT: $vcc_lo = S_AND_B32 %2, $exec_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_redef_sel
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%1:vgpr_32 = COPY $vgpr0
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop2_used_sel
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, %0, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop2_used_sel
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec
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$vcc_lo = S_AND_B32 $exec_lo, killed $vcc_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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$vgpr0 = COPY %1
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S_ENDPGM 0, implicit $vgpr0
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...
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# GCN: name: negated_cond_vop2_used_vcc
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc_lo, implicit $exec
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# GCN-NEXT: $sgpr0_sgpr1 = COPY $vcc
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, %0, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop2_used_vcc
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec
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$sgpr0_sgpr1 = COPY $vcc
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$vcc_lo = S_AND_B32 $exec_lo, killed $vcc_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_sel_wrong_subreg1
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF
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# GCN-NEXT: %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: %2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec
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# GCN-NEXT: $vcc_lo = S_AND_B32 %2, $exec_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_sel_wrong_subreg1
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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undef %1.sub1 = IMPLICIT_DEF
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%1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_sel_wrong_subreg2
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF
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# GCN-NEXT: %2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec
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# GCN-NEXT: $vcc_lo = S_AND_B32 %2, $exec_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_sel_wrong_subreg2
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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undef %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%1.sub1 = IMPLICIT_DEF
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_sel_right_subreg1
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, %0, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_sel_right_subreg1
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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undef %1.sub1 = IMPLICIT_DEF
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%1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub0, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_sel_right_subreg2
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF
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# GCN-NEXT: $vcc_lo = S_ANDN2_B32 $exec_lo, %0, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_sel_right_subreg2
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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undef %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%1.sub1 = IMPLICIT_DEF
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub0, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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# GCN: name: negated_cond_vop3_sel_subreg_overlap
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# GCN: %0:sgpr_32 = IMPLICIT_DEF
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# GCN-NEXT: %1.sub2:vreg_128 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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# GCN-NEXT: %1.sub2_sub3:vreg_128 = IMPLICIT_DEF
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# GCN-NEXT: %2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub2, 1, implicit $exec
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# GCN-NEXT: $vcc_lo = S_AND_B32 %2, $exec_lo, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc_lo
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---
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name: negated_cond_vop3_sel_subreg_overlap
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body: |
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bb.0:
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%0:sgpr_32 = IMPLICIT_DEF
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undef %1.sub2:vreg_128 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec
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%1.sub2_sub3 = IMPLICIT_DEF
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%2:sgpr_32 = V_CMP_NE_U32_e64 %1.sub2, 1, implicit $exec
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$vcc_lo = S_AND_B32 killed %2, $exec_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc
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S_BRANCH %bb.1
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0
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...
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