9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
26 lines
847 B
LLVM
26 lines
847 B
LLVM
; RUN: llc -mtriple=r600 -mcpu=cypress < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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; Make sure we don't overwrite workitem information with private memory
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; FUNC-LABEL: {{^}}work_item_info:
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; R600-NOT: MOV T0.X
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; Additional check in case the move ends up in the last slot
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; R600-NOT: MOV * TO.X
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define amdgpu_kernel void @work_item_info(ptr addrspace(1) %out, i32 %in) {
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entry:
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%0 = alloca [2 x i32], addrspace(5)
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%1 = getelementptr [2 x i32], ptr addrspace(5) %0, i32 0, i32 1
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store i32 0, ptr addrspace(5) %0
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store i32 1, ptr addrspace(5) %1
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%2 = getelementptr [2 x i32], ptr addrspace(5) %0, i32 0, i32 %in
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%3 = load i32, ptr addrspace(5) %2
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%4 = call i32 @llvm.r600.read.tidig.x()
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%5 = add i32 %3, %4
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store i32 %5, ptr addrspace(1) %out
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ret void
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}
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