fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
28 lines
1.1 KiB
LLVM
28 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tonga < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; FIXME: This should go in existing select.ll test, except the current testcase there is broken on GCN
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; GCN-LABEL: {{^}}select_i1:
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; GCN: s_cselect_b32
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; GCN-NOT: v_cndmask_b32
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define amdgpu_kernel void @select_i1(ptr addrspace(1) %out, i32 %cond, i1 %a, i1 %b) nounwind {
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%cmp = icmp ugt i32 %cond, 5
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%sel = select i1 %cmp, i1 %a, i1 %b
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store i1 %sel, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}s_minmax_i1:
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; GCN: s_load_dword [[LOAD:s[0-9]+]],
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; GCN: s_bitcmp1_b32 [[LOAD]], 0
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; GCN: s_cselect_b32 [[SHIFTVAL:s[0-9]+]], 8, 16
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; GCN: s_lshr_b32 [[LOAD]], [[LOAD]], [[SHIFTVAL]]
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; GCN: s_and_b32 [[LOAD]], [[LOAD]], 1
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define amdgpu_kernel void @s_minmax_i1(ptr addrspace(1) %out, [8 x i32], i1 zeroext %cond, i1 zeroext %a, i1 zeroext %b) nounwind {
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%cmp = icmp slt i1 %cond, false
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%sel = select i1 %cmp, i1 %a, i1 %b
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store i1 %sel, ptr addrspace(1) %out, align 4
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ret void
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}
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