llvm-project/llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
Shilei Tian fc0653f31c
[RFC][NFC][AMDGPU] Remove -verify-machineinstrs from llvm/test/CodeGen/AMDGPU/*.ll (#150024)
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
2025-07-23 13:42:46 -04:00

20 lines
860 B
LLVM

; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefix=SI %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s
; Copy VGPR -> SGPR used twice as an instruction operand, which is then
; used in an REG_SEQUENCE that also needs to be handled.
; SI-LABEL: {{^}}test_dup_operands:
; SI: v_add_{{[iu]}}32_e32
define amdgpu_kernel void @test_dup_operands(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) {
%a = load <2 x i32>, ptr addrspace(1) %in
%lo = extractelement <2 x i32> %a, i32 0
%hi = extractelement <2 x i32> %a, i32 1
%add = add i32 %lo, %lo
%vec0 = insertelement <2 x i32> poison, i32 %add, i32 0
%vec1 = insertelement <2 x i32> %vec0, i32 %hi, i32 1
store <2 x i32> %vec1, ptr addrspace(1) %out, align 8
ret void
}