8387cbd0f9
AMDGPU: Delete spills of undef values It would be a bit more logical to preserve the undef and do the normal expansion, but this is less work. This avoids verifier errors in a future patch which starts deleting liveness from registers after allocation failures which results in spills of undef values. https://reviews.llvm.org/D122607 Move where undef sgpr spills are deleted
99 lines
3.3 KiB
YAML
99 lines
3.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck %s
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#
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# Check for liveness errors when spilling partially defined super registers.
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---
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name: sgpr_spill_s64_undef_high32
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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hasSpilledSGPRs: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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stack:
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- { id: 0, type: spill-slot, size: 8, alignment: 4, stack-id: sgpr-spill }
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body: |
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bb.0:
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liveins: $sgpr4
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; CHECK-LABEL: name: sgpr_spill_s64_undef_high32
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; CHECK: liveins: $sgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, [[DEF]], implicit-def $sgpr4_sgpr5, implicit $sgpr4_sgpr5
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, [[DEF]], implicit $sgpr4_sgpr5
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SI_SPILL_S64_SAVE renamable $sgpr4_sgpr5, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32 :: (store (s64) into %stack.0, align 4, addrspace 5)
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...
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---
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name: sgpr_spill_s64_undef_low32
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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hasSpilledSGPRs: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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stack:
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- { id: 0, type: spill-slot, size: 8, alignment: 4, stack-id: sgpr-spill }
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body: |
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bb.0:
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liveins: $sgpr5
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; CHECK-LABEL: name: sgpr_spill_s64_undef_low32
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; CHECK: liveins: $sgpr5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, [[DEF]], implicit-def $sgpr4_sgpr5, implicit $sgpr4_sgpr5
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, [[DEF]], implicit $sgpr4_sgpr5
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SI_SPILL_S64_SAVE renamable $sgpr4_sgpr5, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32 :: (store (s64) into %stack.0, align 4, addrspace 5)
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...
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---
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name: sgpr_spill_s32_undef
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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hasSpilledSGPRs: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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stack:
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- { id: 0, type: spill-slot, size: 4, alignment: 4, stack-id: sgpr-spill }
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body: |
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bb.0:
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; CHECK-LABEL: name: sgpr_spill_s32_undef
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; CHECK: body:
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; CHECK-NEXT: bb.0:
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; CHECK-NOT: {{.+}}
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; CHECK: ...
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SI_SPILL_S32_SAVE undef $sgpr8, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32 :: (store (s32) into %stack.0, align 4, addrspace 5)
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...
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---
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name: sgpr_spill_s64_undef
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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hasSpilledSGPRs: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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stack:
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- { id: 0, type: spill-slot, size: 8, alignment: 4, stack-id: sgpr-spill }
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body: |
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bb.0:
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; CHECK-LABEL: name: sgpr_spill_s64_undef
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; CHECK: body:
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; CHECK-NEXT: bb.0:
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; CHECK-NOT: {{.+}}
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; CHECK: ...
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SI_SPILL_S64_SAVE undef $sgpr8_sgpr9, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32 :: (store (s64) into %stack.0, align 4, addrspace 5)
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...
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