ac0f64f06d
Allocating wwm-registers and per-thread VGPR operands together imposes many challenges in the way the registers are reused during allocation. There are times when regalloc reuses the registers of regular VGPRs operations for wwm-operations in a small range leading to unwantedly clobbering their inactive lanes causing correctness issues that are hard to trace. This patch splits the VGPR allocation pipeline further to allocate wwm-registers first and the regular VGPR operands in a separate pipeline. The splitting would ensure that the physical registers used for wwm allocations won't take part in the next allocation pipeline to avoid any such clobbering.
78 lines
2.9 KiB
YAML
78 lines
2.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -amdgpu-enable-rewrite-partial-reg-uses=false -amdgpu-dce-in-ra=0 -stress-regalloc=1 -start-before=register-coalescer -stop-after=greedy,1 -o - %s | FileCheck %s
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# https://bugs.llvm.org/show_bug.cgi?id=33620
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---
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# This would assert due to the empty live interval created for %9
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# on the last S_NOP with an undef subreg use.
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name: expecting_non_empty_interval
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
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stackPtrOffsetReg: $sgpr32
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body: |
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; CHECK-LABEL: name: expecting_non_empty_interval
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: undef [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = V_MOV_B32_e32 1786773504, implicit $exec
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; CHECK-NEXT: dead [[V_MUL_F32_e32_:%[0-9]+]]:vgpr_32 = V_MUL_F32_e32 0, [[V_MOV_B32_e32_]].sub1, implicit $mode, implicit $exec
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; CHECK-NEXT: undef [[V_MAC_F32_e32_:%[0-9]+]].sub1:vreg_64 = V_MAC_F32_e32 0, undef %1:vgpr_32, undef [[V_MAC_F32_e32_]].sub1, implicit $mode, implicit $exec
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]].sub1
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; CHECK-NEXT: S_NOP 0, implicit [[V_MAC_F32_e32_]].sub1
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; CHECK-NEXT: S_NOP 0, implicit undef [[V_MAC_F32_e32_]].sub0
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bb.0:
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successors: %bb.1
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undef %0.sub1:vreg_64 = V_MAC_F32_e32 0, undef %1:vgpr_32, undef %0.sub1, implicit $mode, implicit $exec
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undef %2.sub1:vreg_64 = V_MOV_B32_e32 1786773504, implicit $exec
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dead %3:vgpr_32 = V_MUL_F32_e32 0, %2.sub1, implicit $mode, implicit $exec
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bb.1:
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S_NOP 0, implicit %2.sub1
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S_NOP 0, implicit %0.sub1
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S_NOP 0, implicit undef %0.sub0
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...
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# Similar assert which happens when trying to rematerialize.
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# https://bugs.llvm.org/show_bug.cgi?id=33884
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---
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name: rematerialize_empty_interval_has_reference
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
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stackPtrOffsetReg: $sgpr32
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body: |
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; CHECK-LABEL: name: rematerialize_empty_interval_has_reference
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: undef [[V_MOV_B32_e32_:%[0-9]+]].sub2:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: undef [[V_MOV_B32_e32_1:%[0-9]+]].sub2:vreg_128 = V_MOV_B32_e32 1786773504, implicit $exec
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]].sub2
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; CHECK-NEXT: S_NOP 0, implicit undef [[V_MOV_B32_e32_]].sub0
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; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]].sub2
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bb.0:
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successors: %bb.1
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undef %0.sub2:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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undef %1.sub2:vreg_128 = V_MOV_B32_e32 1786773504, implicit $exec
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bb.1:
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S_NOP 0, implicit %1.sub2
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S_NOP 0, implicit undef %0.sub0
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S_NOP 0, implicit %0.sub2
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...
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