72bc0525d8
We currently just need to shift down 32bit wwm registers. Previous check condition mistakenly select 16bit registers in true16 mode. Update check condition to skip the 16bit register in wmm reg sorting
29 lines
1.4 KiB
YAML
29 lines
1.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GCN %s
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---
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name: wwm_reg_skip_sort_16bit
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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body: |
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bb.0:
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; GCN-LABEL: name: wwm_reg_skip_sort_16bit
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; GCN: renamable $sgpr0 = ENTER_STRICT_WWM -1, implicit-def $exec, implicit-def $scc, implicit $exec
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; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
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; GCN-NEXT: renamable $sgpr1 = V_READLANE_B32 $vgpr0, 31
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; GCN-NEXT: renamable $sgpr2 = S_MOV_B32 0
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; GCN-NEXT: undef $vgpr0_lo16 = V_CNDMASK_B16_t16_e64 0, 0, 0, killed $sgpr1, killed $sgpr2, 0, implicit $exec
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; GCN-NEXT: $exec_lo = EXIT_STRICT_WWM killed renamable $sgpr0
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; GCN-NEXT: early-clobber renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec
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; GCN-NEXT: S_ENDPGM 0, implicit killed renamable $vgpr1
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renamable $sgpr0 = ENTER_STRICT_WWM -1, implicit-def $exec, implicit-def $scc, implicit $exec
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$vgpr0 = IMPLICIT_DEF
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renamable $sgpr1 = V_READLANE_B32 $vgpr0, 31
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renamable $sgpr2 = S_MOV_B32 0
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undef $vgpr0_lo16 = V_CNDMASK_B16_t16_e64 0, 0, 0, killed $sgpr1, killed $sgpr2, 0, implicit $exec
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$exec_lo = EXIT_STRICT_WWM killed renamable $sgpr0
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early-clobber renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec
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S_ENDPGM 0, implicit killed renamable $vgpr1
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...
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