b2e69f52bb
This commit references RISC-V to add a machine function pass to merge the base address and offset.
43 lines
1.3 KiB
LLVM
43 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s
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@a= external dso_local global i32, code_model "small", align 4
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define dso_local signext i32 @local_small() #0 {
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; CHECK-LABEL: local_small:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcalau12i $a0, %pc_hi20(a)
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; CHECK-NEXT: ld.w $a0, $a0, %pc_lo12(a)
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; CHECK-NEXT: ret
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%1 = load i32, ptr @a, align 4
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ret i32 %1
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}
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@b= external dso_local global i32, code_model "large", align 4
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define dso_local signext i32 @local_large() #0 {
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; CHECK-LABEL: local_large:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcalau12i $a0, %pc_hi20(b)
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; CHECK-NEXT: addi.d $a1, $zero, %pc_lo12(b)
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; CHECK-NEXT: lu32i.d $a1, %pc64_lo20(b)
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; CHECK-NEXT: lu52i.d $a1, $a1, %pc64_hi12(b)
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; CHECK-NEXT: ldx.w $a0, $a1, $a0
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; CHECK-NEXT: ret
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%1 = load i32, ptr @b, align 4
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ret i32 %1
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}
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@c= external global i32, code_model "large", align 4
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define dso_local signext i32 @non_local_large() #0 {
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; CHECK-LABEL: non_local_large:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcalau12i $a0, %got_pc_hi20(c)
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; CHECK-NEXT: ld.d $a0, $a0, %got_pc_lo12(c)
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; CHECK-NEXT: ld.w $a0, $a0, 0
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; CHECK-NEXT: ret
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%1 = load i32, ptr @c, align 4
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ret i32 %1
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}
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