
This patch adds codegen support for the calling convention defined by the ILP32D ABI, which passes `f64` values using a soft-float mechanism. Similar to RISC-V, it introduces pseudo-instructions to construct an `f64` value from a pair of `i32`s, and to split an `f64` into two `i32` values.
57 lines
1.8 KiB
LLVM
57 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+d --target-abi=ilp32d --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA32 %s
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; RUN: llc --mtriple=loongarch64 --mattr=+d --target-abi=lp64d --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA64 %s
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@gd = external dso_local global double
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define double @constraint_f_double(double %a) nounwind {
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; LA32-LABEL: constraint_f_double:
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; LA32: # %bb.0:
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; LA32-NEXT: pcalau12i $a0, %pc_hi20(gd)
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; LA32-NEXT: fld.d $fa1, $a0, %pc_lo12(gd)
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; LA32-NEXT: #APP
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; LA32-NEXT: fadd.d $fa0, $fa0, $fa1
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: ret
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;
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; LA64-LABEL: constraint_f_double:
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; LA64: # %bb.0:
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; LA64-NEXT: pcalau12i $a0, %pc_hi20(gd)
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; LA64-NEXT: fld.d $fa1, $a0, %pc_lo12(gd)
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; LA64-NEXT: #APP
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; LA64-NEXT: fadd.d $fa0, $fa0, $fa1
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: ret
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%1 = load double, ptr @gd
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%2 = tail call double asm "fadd.d $0, $1, $2", "=f,f,f"(double %a, double %1)
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ret double %2
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}
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define double @constraint_gpr(double %a) {
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; LA32-LABEL: constraint_gpr:
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; LA32: # %bb.0:
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; LA32-NEXT: .cfi_def_cfa_offset 0
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; LA32-NEXT: movfr2gr.s $a7, $fa0
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; LA32-NEXT: movfrh2gr.s $t0, $fa0
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; LA32-NEXT: #APP
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; LA32-NEXT: move $a6, $a7
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: movgr2fr.w $fa0, $a6
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; LA32-NEXT: movgr2frh.w $fa0, $a7
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; LA32-NEXT: ret
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;
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; LA64-LABEL: constraint_gpr:
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; LA64: # %bb.0:
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; LA64-NEXT: .cfi_def_cfa_offset 0
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; LA64-NEXT: movfr2gr.d $a7, $fa0
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; LA64-NEXT: #APP
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; LA64-NEXT: move $a6, $a7
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: movgr2fr.d $fa0, $a6
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; LA64-NEXT: ret
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%1 = tail call double asm sideeffect alignstack "move $0, $1", "={$r10},{$r11}"(double %a)
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ret double %1
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}
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