64a0478e08
This patch adds an emergency spill slot when ran out of registers. PR #139201 introduces `vstelm` instructions with only 8-bit imm offset, it causes no spill slot to store the spill registers.
28 lines
1.1 KiB
LLVM
28 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s
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%Box = type [6 x i64]
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define void @box(ptr noalias nocapture noundef writeonly sret(%Box) align 16 dereferenceable(48) %b, i64 %i) {
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; CHECK-LABEL: box:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.d $sp, $sp, -112
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; CHECK-NEXT: .cfi_def_cfa_offset 112
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; CHECK-NEXT: slli.d $a2, $a1, 5
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; CHECK-NEXT: alsl.d $a1, $a1, $a2, 4
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; CHECK-NEXT: addi.d $a2, $sp, 16
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; CHECK-NEXT: add.d $a3, $a2, $a1
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; CHECK-NEXT: vldx $vr0, $a1, $a2
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; CHECK-NEXT: vld $vr1, $a3, 32
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; CHECK-NEXT: vld $vr2, $a3, 16
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: vst $vr1, $a0, 32
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; CHECK-NEXT: vst $vr2, $a0, 16
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; CHECK-NEXT: addi.d $sp, $sp, 112
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; CHECK-NEXT: ret
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%1 = alloca [2 x %Box], align 16
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%2 = getelementptr inbounds [2 x %Box], ptr %1, i64 0, i64 %i
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call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(48) %b, ptr noundef nonnull align 16 dereferenceable(48) %2, i64 48, i1 false)
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ret void
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}
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