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llvm-project/llvm/test/CodeGen/Thumb2
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Craig Topper 9240061800
[RegAllocFast] Don't align stack slots if the stack can't be realigned (#153682) 
This is the fast regalloc equivalent of
773771ba382b1fbcf6acccc0046bfe731541a599.
2025-08-19 08:17:26 -07:00
..
LowOverheadLoops
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
mve-intrinsics
[ARM] Handle roundeven for MVE. (#142557)
2025-06-08 18:23:50 +01:00
2009-07-17-CrossRegClassCopy.ll
…
2009-07-21-ISelBug.ll
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2009-07-23-CPIslandBug.ll
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2009-07-30-PEICrash.ll
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2009-08-01-WrongLDRBOpc.ll
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2009-08-02-CoalescerBug.ll
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2009-08-04-CoalescerAssert.ll
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2009-08-04-CoalescerBug.ll
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2009-08-04-ScavengerAssert.ll
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2009-08-04-SubregLoweringBug2.ll
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2009-08-04-SubregLoweringBug3.ll
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2009-08-04-SubregLoweringBug.ll
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2009-08-06-SpDecBug.ll
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2009-08-07-CoalescerBug.ll
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2009-08-07-NeonFPBug.ll
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2009-08-08-ScavengerAssert.ll
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2009-08-10-ISelBug.ll
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2009-08-21-PostRAKill4.ll
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2009-09-01-PostRAProlog.ll
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2009-10-15-ITBlockBranch.ll
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2009-11-01-CopyReg2RegBug.ll
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2009-11-11-ScavengerAssert.ll
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2009-11-13-STRDBug.ll
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2009-12-01-LoopIVUsers.ll
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2010-01-06-TailDuplicateLabels.ll
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2010-01-19-RemovePredicates.ll
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2010-02-11-phi-cycle.ll
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2010-02-24-BigStack.ll
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2010-03-08-addi12-ccout.ll
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2010-03-15-AsmCCClobber.ll
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2010-04-15-DynAllocBug.ll
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2010-04-26-CopyRegCrash.ll
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2010-05-24-rsbs.ll
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2010-06-14-NEONCoalescer.ll
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2010-06-19-ITBlockCrash.ll
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2010-06-21-TailMergeBug.ll
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2010-08-10-VarSizedAllocaBug.ll
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2010-11-22-EpilogueBug.ll
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2010-12-03-AddSPNarrowing.ll
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2011-04-21-FILoweringBug.ll
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2011-06-07-TwoAddrEarlyClobber.ll
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2011-12-16-T2SizeReduceAssert.ll
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2012-01-13-CBNZBug.ll
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2013-02-19-tail-call-register-hint.ll
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2013-03-02-vduplane-nonconstant-source-index.ll
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2013-03-06-vector-sext-operand-scalarize.ll
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aapcs.ll
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abds-crash.ll
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abs.ll
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active_lane_mask.ll
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aligned-constants.ll
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aligned-nonfallthrough.ll
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aligned-spill.ll
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avoidmuls.mir
[ARM] Add "avoidmuls" to STAR-MC1 also (#123706)
2025-02-05 07:44:53 +00:00
bf16-instructions.ll
[ARM]: codegen llvm.roundeven.v* (#141786)
2025-05-30 19:36:29 +01:00
bf16-pcs.ll
[ARM] Fix calling convention for __fp16 with big-endian (#126741)
2025-02-13 09:09:29 +00:00
bfi.ll
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bfx.ll
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bicbfi.ll
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bti-entry-blocks.ll
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bti-indirect-branches.ll
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bti-jump-table.mir
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bti-outliner-1.ll
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bti-outliner-2.ll
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bti-outliner-cost-1.ll
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bti-outliner-cost-2.ll
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bti-pac-replace-1.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
bti-pac-replace-2.ll
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bug-subw.ll
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buildvector-crash.ll
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call-site-info-update.ll
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carry.ll
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cbnz.ll
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cde-gpr.ll
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cde-vec.ll
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cde-vfp.ll
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cmp-frame.ll
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cmpxchg.mir
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constant-hoisting.ll
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constant-islands-cbz.ll
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constant-islands-cbz.mir
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constant-islands-cbzundef.mir
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constant-islands-jump-table.ll
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constant-islands-ldrsb.mir
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constant-islands-new-island-padding.ll
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constant-islands-new-island.ll
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constant-islands.ll
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cortex-fp.ll
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crash.ll
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cross-rc-coalescing-1.ll
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cross-rc-coalescing-2.ll
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csel-andor-onebit.ll
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csel.ll
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div.ll
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emit-unwinding.ll
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expand-pseudos.mir
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fir.ll
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float-cmp.ll
DAG: Assert fcmp uno runtime calls are boolean values (#142898)
2025-06-10 10:46:29 +09:00
float-intrinsics-double.ll
[ARM]: codegen llvm.roundeven.v* (#141786)
2025-05-30 19:36:29 +01:00
float-intrinsics-float.ll
[ARM]: codegen llvm.roundeven.v* (#141786)
2025-05-30 19:36:29 +01:00
float-ops.ll
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fp16-pcs.ll
[ARM] Fix calling convention for __fp16 with big-endian (#126741)
2025-02-13 09:09:29 +00:00
fp16-stacksplot.mir
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frame-index-addrmode-t2i8s4.mir
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frame-pointer.ll
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frameless2.ll
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frameless.ll
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high-reg-spill.mir
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ifcvt-cbz.mir
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ifcvt-compare.ll
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ifcvt-dead-predicate.mir
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ifcvt-minsize.ll
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ifcvt-neon-deprecated.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
ifcvt-no-branch-predictor.ll
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ifcvt-rescan-bug-2016-08-22.ll
[IR] Only allow lifetime.start/end on allocas (#149310)
2025-07-21 15:04:50 +02:00
ifcvt-rescan-diamonds.ll
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indirect-tail-call-free-registers.ll
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inflate-regs.ll
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inline-asm-i-constraint-i1.ll
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inlineasm-error-t-toofewregs-mve.ll
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inlineasm-mve.ll
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inlineasm.ll
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intrinsics-cc.ll
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intrinsics-coprocessor.ll
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jump-table-bti.ll
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large-call.ll
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large-stack.ll
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ldr-str-imm12.ll
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lit.local.cfg
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longMACt.ll
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lsll0.ll
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lsr-deficiency.ll
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m4-sched-ldr.mir
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m4-sched-regs.ll
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machine-licm.ll
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mul_const.ll
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mve-abs.ll
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mve-basic.ll
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mve-be.ll
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mve-bitarith.ll
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mve-bitcasts.ll
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mve-bitreverse.ll
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mve-blockplacement.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-bswap.ll
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mve-complex-deinterleaving-f16-add.ll
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mve-complex-deinterleaving-f16-mul.ll
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mve-complex-deinterleaving-f32-add.ll
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mve-complex-deinterleaving-f32-mul.ll
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mve-complex-deinterleaving-f64-add.ll
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mve-complex-deinterleaving-f64-mul.ll
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mve-complex-deinterleaving-i8-add.ll
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mve-complex-deinterleaving-i16-add.ll
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mve-complex-deinterleaving-i32-add.ll
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mve-complex-deinterleaving-i64-add.ll
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mve-complex-deinterleaving-mixed-cases.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-complex-deinterleaving-uniform-cases.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
mve-concat.ll
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mve-ctlz.ll
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mve-ctpop.ll
[ARM][RISCV] Partially revert #101786 (#137120)
2025-04-24 10:13:05 +03:00
mve-cttz.ll
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mve-div-expand.ll
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mve-doublereduct.ll
[DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (#115150)
2025-06-24 13:08:59 +01:00
mve-extractelt.ll
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mve-extractstore.ll
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mve-float16regloops.ll
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mve-float32regloops.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-fma-loops.ll
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mve-fmas.ll
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mve-fmath.ll
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mve-fp16convertloops.ll
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mve-fp-negabs.ll
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mve-fpclamptosat_vec.ll
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mve-fptosi-sat-vector.ll
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mve-fptoui-sat-vector.ll
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mve-frint.ll
[ARM] Handle roundeven for MVE. (#142557)
2025-06-08 18:23:50 +01:00
mve-gather-increment.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
mve-gather-ind8-unscaled.ll
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mve-gather-ind16-scaled.ll
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mve-gather-ind16-unscaled.ll
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mve-gather-ind32-scaled.ll
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mve-gather-ind32-unscaled.ll
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mve-gather-optimisation-deep.ll
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mve-gather-ptrs.ll
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mve-gather-scatter-opt.ll
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mve-gather-scatter-optimisation.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
mve-gather-scatter-ptr-address.ll
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mve-gather-scatter-tailpred.ll
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mve-gather-tailpred.ll
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mve-gather-unused.ll
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mve-gatherscatter-mmo.ll
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mve-halving.ll
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mve-insertshuffleload.ll
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mve-laneinterleaving-cost.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-laneinterleaving-reduct.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-laneinterleaving.ll
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mve-ldst-offset.ll
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mve-ldst-postinc.ll
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mve-ldst-preinc.ll
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mve-ldst-regimm.ll
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mve-loadstore.ll
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mve-masked-ldst-offset.ll
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mve-masked-ldst-postinc.ll
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mve-masked-ldst-preinc.ll
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mve-masked-ldst.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
mve-masked-load.ll
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mve-masked-store-mmo.ll
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mve-masked-store.ll
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mve-memtp-branch.ll
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mve-memtp-loop.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-minmax.ll
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mve-minmaxi.ll
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mve-multivec-spill.ll
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mve-neg.ll
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mve-nofloat.ll
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mve-nounrolledremainder.ll
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mve-phireg.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-pipelineloops.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-postinc-dct.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-postinc-distribute.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-postinc-distribute.mir
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mve-postinc-lsr.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-pred-and.ll
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mve-pred-bitcast.ll
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mve-pred-build-const.ll
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mve-pred-build-var.ll
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mve-pred-const.ll
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mve-pred-constfold.ll
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mve-pred-constfold.mir
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mve-pred-convert.ll
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mve-pred-ext.ll
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mve-pred-loadstore.ll
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mve-pred-not.ll
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mve-pred-or.ll
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mve-pred-selectop2.ll
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mve-pred-selectop3.ll
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mve-pred-selectop.ll
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mve-pred-shuffle.ll
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mve-pred-spill.ll
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mve-pred-threshold.ll
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mve-pred-vctpvpsel.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
mve-pred-vselect.ll
[CostModel] Handle all cost kinds in getCmpSelInstrCost (#148233)
2025-07-15 18:08:52 +01:00
mve-pred-xor.ll
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mve-qrintr.ll
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mve-qrintrsplat.ll
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mve-satmul-loops.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mve-saturating-arith.ll
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mve-scatter-increment.ll
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mve-scatter-ind8-unscaled.ll
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mve-scatter-ind16-scaled.ll
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mve-scatter-ind16-unscaled.ll
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mve-scatter-ind32-scaled.ll
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mve-scatter-ind32-unscaled.ll
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mve-scatter-ptrs.ll
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mve-scmp.ll
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mve-selectcc.ll
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mve-sext-masked-load.ll
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mve-sext.ll
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mve-shifts-scalar.ll
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mve-shifts.ll
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mve-shuffle.ll
[Thumb2] Regenerate some test checks. NFC
2025-06-18 11:54:51 +02:00
mve-shuffleext.ll
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mve-shufflemov.ll
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mve-simple-arith.ll
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mve-soft-float-abi.ll
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mve-stack.ll
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mve-stacksplot.mir
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mve-tailpred-loopinvariant.ll
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mve-tailpred-nonzerostart.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
mve-tailpred-vptblock.ll
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mve-tp-loop.mir
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mve-ucmp.ll
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mve-useafterloop.ll
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mve-vabd.ll
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mve-vabdus.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vadc-vsbc-spill.ll
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mve-vaddqr.ll
…
mve-vaddv.ll
…
mve-vcmla.ll
…
mve-vcmp.ll
…
mve-vcmpf.ll
…
mve-vcmpfr.ll
…
mve-vcmpfz.ll
…
mve-vcmpr.ll
…
mve-vcmpz.ll
…
mve-vcreate.ll
…
mve-vctp.ll
…
mve-vcvt16.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
mve-vcvt-fixed-to-float.ll
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mve-vcvt-float-to-fixed.ll
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mve-vcvt.ll
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mve-vdup.ll
[SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitcast. (#133717)
2025-04-03 11:14:08 +01:00
mve-vecreduce-add-combine.ll
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mve-vecreduce-add.ll
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mve-vecreduce-addpred.ll
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mve-vecreduce-bit.ll
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mve-vecreduce-fadd.ll
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mve-vecreduce-fminmax.ll
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mve-vecreduce-fmul.ll
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mve-vecreduce-loops.ll
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mve-vecreduce-mla.ll
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mve-vecreduce-mlapred.ll
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mve-vecreduce-mul.ll
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mve-vecreduce-slp.ll
…
mve-vector-spill.ll
[RegAllocFast] Don't align stack slots if the stack can't be realigned (#153682)
2025-08-19 08:17:26 -07:00
mve-vfma.ll
…
mve-vhadd.ll
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mve-vhaddsub.ll
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mve-vidup.ll
…
mve-vld2-post.ll
…
mve-vld2.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vld3.ll
[Thumb2] Regenerate some test checks. NFC
2025-06-18 11:54:51 +02:00
mve-vld4-post.ll
…
mve-vld4.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vldshuffle.ll
…
mve-vldst4.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vmaxnma-commute.ll
…
mve-vmaxnma-tailpred.ll
…
mve-vmaxv-vminv-scalar.ll
…
mve-vmaxv.ll
…
mve-vmla.ll
…
mve-vmovimm.ll
…
mve-vmovlloop.ll
…
mve-vmovn.ll
…
mve-vmovnstore.ll
…
mve-vmulh.ll
…
mve-vmull-loop.ll
…
mve-vmull-splat.ll
…
mve-vmull.ll
…
mve-vmulqr.ll
…
mve-vmvnimm.ll
…
mve-vpsel.ll
…
mve-vpt-2-blocks-1-pred.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-2-blocks-2-preds.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-2-blocks-ctrl-flow.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-2-blocks-non-consecutive-ins.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-2-blocks.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-3-blocks-kill-vpr.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-1-ins.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-2-ins.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-4-ins.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-debug.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-elses.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-fold-vcmp.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-kill.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-block-optnone.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vpt-blocks.ll
…
mve-vpt-from-intrinsics.ll
…
mve-vpt-nots.mir
…
mve-vpt-optimisations.mir
[ARM] Remove kill flags in ReplaceConstByVPNOTs. (#140082)
2025-05-22 08:24:01 +01:00
mve-vpt-preuse.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
mve-vqdmulh-minmax.ll
…
mve-vqdmulh.ll
…
mve-vqmovn-combine.ll
…
mve-vqmovn.ll
…
mve-vqshrn.ll
…
mve-vselect-constants.ll
[ARM] Override hasAndNotCompare (#145441)
2025-06-29 11:15:56 +01:00
mve-vst2-post.ll
…
mve-vst2.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vst3.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vst4-post.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vst4.ll
PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)
2025-02-22 09:16:14 +07:00
mve-vsubqr.ll
…
mve-widen-narrow.ll
…
mve-wls-block-placement.mir
…
mve-zext-masked-load.ll
…
outlined-fn-may-clobber-lr-in-caller.ll
…
pacbti-m-basic.ll
…
pacbti-m-frame-chain.ll
…
pacbti-m-indirect-tail-call.ll
…
pacbti-m-outliner-1.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
pacbti-m-outliner-2.ll
…
pacbti-m-outliner-3.ll
…
pacbti-m-outliner-4.ll
…
pacbti-m-outliner-5.ll
…
pacbti-m-overalign.ll
…
pacbti-m-stack-arg.ll
…
pacbti-m-unsupported-arch.ll
…
pacbti-m-varargs-1.ll
…
pacbti-m-varargs-2.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
pacbti-m-vla.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
peephole-addsub.mir
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peephole-cmp.mir
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peephole-opt-check-reg-sequence-compose-supports-subreg-index.ll
PeepholeOpt: Immediately check if a reg_sequence compose supports a subregister (#128279)
2025-02-26 10:15:17 +07:00
phi_prevent_copy.mir
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pic-load.ll
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pipeliner-inlineasm.mir
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pipeliner-preserve-ties.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
postinc-distribute.mir
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pr52817.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
scavenge-lr.mir
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schedm7-hazard.ll
[Thumb2] Regenerate some test checks. NFC
2025-06-18 11:54:51 +02:00
segmented-stacks.ll
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setjmp_longjmp.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
shift_parts.ll
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srem-seteq-illegal-types.ll
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stack_guard_remat.ll
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store-prepostinc.mir
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swp-exitbranchdir.mir
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swp-fixedii-le.mir
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swp-fixedii.mir
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swp-regpressure.mir
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t2-teq-reduce.mir
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t2peephole-t2ADDrr-to-t2ADDri.ll
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t2sizereduction.mir
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tail-call-r9.ll
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tbb-removeadd.mir
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thumb2-adc.ll
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thumb2-add2.ll
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thumb2-add3.ll
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thumb2-add4.ll
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thumb2-add5.ll
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thumb2-add6.ll
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thumb2-add.ll
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thumb2-and2.ll
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thumb2-and.ll
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thumb2-asr2.ll
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thumb2-asr.ll
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thumb2-bcc.ll
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thumb2-bfc.ll
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thumb2-bic.ll
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thumb2-branch.ll
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thumb2-call-tc.ll
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thumb2-call.ll
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thumb2-cbnz.ll
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thumb2-clz.ll
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thumb2-cmn2.ll
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thumb2-cmn.ll
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thumb2-cmp.ll
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thumb2-cpsr-liveness.ll
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thumb2-eor2.ll
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thumb2-eor.ll
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thumb2-execute-only-long-calls.ll
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thumb2-execute-only-prologue.ll
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thumb2-ifcvt1-tc.ll
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thumb2-ifcvt1.ll
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thumb2-ifcvt2.ll
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thumb2-ifcvt3.ll
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thumb2-jtb.ll
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thumb2-ldm.ll
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thumb2-ldr_ext.ll
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thumb2-ldr_post.ll
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thumb2-ldr_pre.ll
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thumb2-ldr.ll
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thumb2-ldrb.ll
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thumb2-ldrd.ll
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thumb2-ldrh.ll
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thumb2-lsl2.ll
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thumb2-lsl.ll
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thumb2-lsr2.ll
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thumb2-lsr3.ll
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thumb2-lsr.ll
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thumb2-mla.ll
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thumb2-mls.ll
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thumb2-mov.ll
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thumb2-mul.ll
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thumb2-mulhi.ll
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thumb2-mvn2.ll
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thumb2-mvn.ll
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thumb2-neg.ll
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thumb2-orn2.ll
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thumb2-orn.ll
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thumb2-orr2.ll
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thumb2-orr.ll
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thumb2-pack.ll
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thumb2-rev16.ll
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thumb2-rev.ll
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thumb2-ror.ll
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thumb2-rsb2.ll
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thumb2-rsb.ll
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thumb2-sbc.ll
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thumb2-select_xform.ll
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thumb2-select.ll
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thumb2-shifter.ll
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thumb2-smla.ll
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thumb2-smul.ll
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thumb2-spill-q.ll
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thumb2-str_post.ll
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thumb2-str_pre.ll
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thumb2-str.ll
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thumb2-strb.ll
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thumb2-strh.ll
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thumb2-sub2.ll
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thumb2-sub3.ll
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thumb2-sub4.ll
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thumb2-sub5.ll
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thumb2-sub.ll
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thumb2-sxt_rot.ll
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thumb2-sxt-uxt.ll
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thumb2-tbb.ll
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thumb2-tbh.ll
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thumb2-teq2.ll
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thumb2-teq.ll
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thumb2-tst2.ll
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thumb2-tst.ll
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thumb2-uxt_rot.ll
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thumb2-uxtb.ll
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tls1.ll
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tls2.ll
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tpsoft.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
umulo-64-legalisation-lowering.ll
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umulo-128-legalisation-lowering.ll
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unreachable-large-offset-gep.ll
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urem-seteq-illegal-types.ll
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v8_IT_1.ll
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v8_IT_2.ll
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v8_IT_3.ll
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v8_IT_4.ll
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v8_IT_5.ll
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v8_IT_6.ll
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vmovdrroffset.ll
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vqabs.ll
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vqneg.ll
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