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llvm-project/llvm/test/TableGen
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Mikołaj Piróg 25653e558c
[AVX10.2] Update convert chapter intrinsic and mnemonics names (#123656) 
Intel spec for avx10.2
(https://cdrdv2.intel.com/v1/dl/getContent/828965) has been updated.
This PR changes relevant names from the "AVX10 CONVERT INSTRUCTIONS"
chapter .
2025-01-23 22:23:56 +08:00
..
Common
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FixedLenDecoderEmitter
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GlobalISelCombinerEmitter
Make a tablegen test match-table.td more robust.
2024-10-08 13:16:06 +01:00
GlobalISelEmitter
[TableGen][GlobalISel] Reorder atomic predicate to preserve the order (#121806)
2025-01-16 17:06:21 +01:00
SDNodeInfoEmitter
[TableGen] Add a backend generating SDNode descriptions (#123002)
2025-01-22 09:01:08 +03:00
64-bit-int.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
2003-08-03-PassCode.td
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2006-09-18-LargeInt.td
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2010-03-24-PrematureDefaults.td
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AcquireAtCycle.td
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address-space-patfrags.td
[TableGen][GlobalISel] Reorder atomic predicate to preserve the order (#121806)
2025-01-16 17:06:21 +01:00
AliasAsmString.td
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AllowDuplicateRegisterNames.td
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ambiguous-composition.td
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AnonDefinitionOnDemand.td
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anonymous-location.td
[LIT] Rename substitution %basename_s to %{s:basename} (#111062)
2024-10-03 18:18:10 -07:00
arithmetic.td
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ArtificialSubregs.td
[TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)
2024-11-04 16:10:50 +00:00
AsmPredicateCombining.td
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AsmPredicateCombiningRISCV.td
[RISCV] Don't convert virtual register Register to MCRegister in isCompressibleInst. (#122843)
2025-01-13 23:36:09 -08:00
AsmPredicateCondsEmission.td
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AsmVariant.td
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AsmWriterPCRelOp.td
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assert.td
[TableGen] Print assert message inline with assert failure (#111184)
2024-10-04 13:21:50 -07:00
bare-minimum-psets.td
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BigEncoder.td
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BitOffsetDecoder.td
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BitsInit.td
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BitsInitOverflow.td
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cast-list-initializer.td
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cast-multiclass.td
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cast-string.td
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cast-typeerror.td
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cast.td
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check-duplicate-tuple-regs.td
[TableGen] Check for duplicate register tuple definitions. (#95725)
2024-06-25 16:42:29 -05:00
ClassInstanceValue.td
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code.td
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CodeGenSchedule-duplicate-instrw.td
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compare.td
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CompressWriteLatencyEntry.td
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ConcatenatedSubregs.td
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cond-bitlist.td
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cond-default.td
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cond-empty-list-arg.td
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cond-inheritance.td
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cond-let.td
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cond-list.td
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cond-subclass.td
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cond-type.td
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cond-usage.td
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condsbit.td
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ConstraintChecking1.td
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ConstraintChecking2.td
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ConstraintChecking3.td
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ConstraintChecking4.td
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ConstraintChecking5.td
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ConstraintChecking6.td
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ConstraintChecking7.td
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ConstraintChecking8.td
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ConstraintChecking.inc
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CStyleComment.td
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dag-functional.td
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dag-isel-complexpattern.td
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dag-isel-instrument.td
[llvm-tblgen] Increase Coverage Index Size (#118329)
2024-12-04 09:19:13 +00:00
dag-isel-regclass-emit-enum.td
[MVT][TableGen] Extend Machine Value Type to uint16_t (#99657)
2024-08-01 01:19:14 +08:00
dag-isel-res-order.td
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dag-isel-subregs.td
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Dag.td
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DAGDefaultOps.td
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def-multiple-operands.td
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defmclass.td
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DefmInherit.td
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DefmInsideMultiClass.td
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defset-typeerror.td
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defset.td
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deftype.td
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defvar.td
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detailed-records.td
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directive1.td
[TableGen] Add explicit symbol visibility macros to code generated (#107873)
2024-09-19 12:42:46 -07:00
directive2.td
[TableGen] Add explicit symbol visibility macros to code generated (#107873)
2024-09-19 12:42:46 -07:00
directive3.td
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dump.td
[TableGen] Resolve References at top level (#104578)
2024-08-19 21:05:39 +05:30
duplicate-include.inc
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duplicate-include.td
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DuplicateFieldValues.td
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empty-psets.td
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empty.td
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eq-unset.td
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eq.td
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eqbit.td
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exists-error-non-string.td
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exists-error-record.td
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exists-error-uninitialized.td
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exists.td
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FastISelEmitter.td
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field-access-initializers.td
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FieldAccess.td
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filter.td
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find.td
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foldl.td
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foreach-eval.td
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foreach-leak.td
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foreach-multiclass.td
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foreach-range-parse-errors0.td
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foreach-range-parse-errors1.td
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foreach-range-parse-errors2.td
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foreach-range-parse-errors3.td
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foreach-range-parse-errors4.td
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foreach-range-parse-errors5.td
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foreach-variable-range.td
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foreach.td
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ForeachList.td
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ForeachLoop.td
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ForwardRef.td
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GeneralList.td
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generic-tables-instruction.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
generic-tables-return-range.td
[TableGen] Add support for emitting new function definition to return a range of results for Primary Key (#96174)
2024-07-11 10:54:31 -07:00
generic-tables.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
GenTags.td
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get-operand-type-no-expand.td
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get-operand-type.td
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getsetop.td
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HasNoUse.td
DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)
2024-06-13 11:52:22 +02:00
HwModeBitSet.td
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HwModeEncodeAPInt.td
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HwModeEncodeDecode2.td
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HwModeEncodeDecode3.td
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HwModeEncodeDecode.td
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HwModeSelect.td
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HwModeSubRegs.td
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if-empty-list-arg.td
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if-type.td
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if-unresolved-cast.td
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if.td
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ifbit.td
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ifstmt.td
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Include.inc
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Include.td
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inhibit-pset.td
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initialized.td
[llvm][TableGen] Add a !initialized predicate to allow testing for ? (#117964)
2024-12-17 20:34:35 -06:00
IntBitInit.td
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interleave.td
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intrinsic-attrs.td
[LLVM][TableGen] Decrease code size of Intrinsic::getAttributes (#110573)
2024-10-01 09:08:47 -07:00
intrinsic-duplicate-name.td
[LLVM][TableGen] Add error check for duplicate intrinsic names (#109226)
2024-09-19 05:21:00 -07:00
intrinsic-long-name.td
[TableGen] Refactor Intrinsics record (#106986)
2024-09-04 15:04:10 -07:00
intrinsic-overload-conflict.td
[LLVM][TableGen] Refine overloaded intrinsic suffix check (#117957)
2024-12-03 13:33:15 -05:00
intrinsic-prefix-error.td
[TableGen] Add PrintError family overload that take a print function (#107333)
2024-09-07 05:13:54 -07:00
intrinsic-struct.td
[TableGen] Add check for number of intrinsic return values (#107326)
2024-09-05 14:52:30 -07:00
intrinsic-target-prefix-for-target-independent.td
[LLVM][TableGen] Check name conflicts between target dep and independent intrinsics (#109826)
2024-09-25 12:01:17 -07:00
intrinsic-varargs.td
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IntSpecialValues.td
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invalid-macro-name-command-line.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
invalid-type-cast-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
InvalidMCSchedClassDesc.td
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isa.td
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JSON-check.py
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JSON-locs.td
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JSON.td
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LazyChange.td
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LetInsideMultiClasses.td
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letUnknownValue.td
[llvm][TableGen] Fix misleading error for invalid use of let (#118616)
2024-12-09 13:21:46 +00:00
lisp.td
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list-element-bitref.td
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ListArgs.td
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ListArgsSimple.td
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listconcat.td
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ListConversion.td
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listflatten-error.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
listflatten.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
ListManip.td
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ListOfList.td
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listpaste.td
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listremove.td
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ListSlices-fail.td
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ListSlices.td
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listsplat.td
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lit.local.cfg
[AIX] Use internal lit shell for TableGen instead of a global setting (#113627)
2024-10-25 13:06:02 -04:00
LoLoL.td
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MacroFusion.td
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math.td
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MissingOperandField.td
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MixedCasedMnemonic.td
[TableGen] Allow empty terminator in SequenceToOffsetTable (#119751)
2024-12-13 19:55:11 +03:00
MnemonicAlias.td
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MultiClass-def-fail.td
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MultiClass-defm-fail.td
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MultiClass-defm.td
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MultiClass.td
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MultiClassDefName.td
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MultiClassInherit.td
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MultiPat.td
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multiple-type-casts-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
name-resolution-consistency.td
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named-arguments.td
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nested_ifdef2.inc
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nested_ifdef_main.td
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nested_ifdef.inc
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nested-comment.td
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NestedForeach.td
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nul-char.td
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paste-reserved.td
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Paste.td
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pr8330.td
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predicate-patfags.td
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prep-diag1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag3.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag4.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag5.td
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prep-diag6.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag7.td
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prep-diag8.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag9.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag10.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag11-include.inc
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prep-diag11.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag12-include.inc
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prep-diag12.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag13.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag14.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef.td
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prep-region-include.inc
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prep-region-processing.td
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ProcessorUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
pset-enum.td
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pseudo-inst-expansion.td
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range-lists.td
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range-op-fail.td
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range-op.td
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rc-weight-override.td
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ReadAdvanceInvalidWrite.td
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RegBankFromRegClass.td
[GISel][TableGen] Generate getRegBankFromRegClass (#99896)
2024-07-25 09:41:55 -04:00
RegisterBankEmitter.td
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RegisterClass.td
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RegisterEncoder.td
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RegisterInfoEmitter-BaseClassOrder.td
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RegisterInfoEmitter-regcost-list.td
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RegisterInfoEmitter-regcost-tuple.td
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RegisterInfoEmitter-regcost.td
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RegisterInfoEmitter-tsflags.td
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RelTest.td
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repr.td
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riscv-target-def.td
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
2024-11-22 22:58:54 +08:00
SchedModelError.td
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searchabletables-intrinsic.td
[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)
2024-09-07 15:11:34 -07:00
self-reference-recursion.td
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self-reference-typeerror.td
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self-reference.td
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SetTheory.td
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SiblingForeach.td
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simplify-patfrag.td
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size.td
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Slice.td
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spurious-semi.td
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strconcat.td
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string_ops.td
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String.td
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subst2.td
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subst.td
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substr.td
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SubtargetFeatureUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
SuperSubclassSameName.td
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TargetInstrInfo.td
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TargetInstrSpec.td
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template-arg-dependency.td
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template-args.td
[TableGen] Do not exit in template argument check (#121636)
2025-01-06 21:06:17 +01:00
TemplateArgRename.td
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Tree.td
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TreeNames.td
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true-false.td
[TableGen] Make !and and !or short-circuit (#113963)
2024-11-07 10:22:03 -08:00
trydecode-emission2.td
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trydecode-emission3.td
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trydecode-emission4.td
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trydecode-emission.td
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TwoLevelName.td
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UnsetBitInit.td
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unsetop.td
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unterminated-c-comment-include.inc
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unterminated-c-comment.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
unterminated-code-block-include.inc
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unterminated-code-block.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
UnterminatedComment.td
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usevalname.td
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ValidIdentifiers.td
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VarLenDecoder.td
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VarLenEncoder.td
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VarLenEncoderHwModes.td
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warn-unused-template-arg.td
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x86-fold-tables.inc
[AVX10.2] Update convert chapter intrinsic and mnemonics names (#123656)
2025-01-23 22:23:56 +08:00
x86-fold-tables.td
[TableGen] Handle Windows line endings in x86-fold-tables.td test (#112997)
2024-10-21 09:58:59 -07:00
x86-instr-mapping.inc
[X86][APX] Support APX + AMX-MOVRS/AMX-TRANSPOSE (#123267)
2025-01-17 17:51:42 +08:00
x86-instr-mapping.td
Test added for x86-instr-mapping (#115170)
2024-11-07 19:09:21 +08:00