
This commit partially implements SPIRTargetCodeGenInfo::getHLSLType. It can now generate the spirv type for the following HLSL types: 1. RWBuffer 2. Buffer 3. Sampler --------- Co-authored-by: Nathan Gauër <github@keenuts.net>
414 lines
16 KiB
C++
414 lines
16 KiB
C++
//===- SPIR.cpp -----------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "ABIInfoImpl.h"
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#include "TargetInfo.h"
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using namespace clang;
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using namespace clang::CodeGen;
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//===----------------------------------------------------------------------===//
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// Base ABI and target codegen info implementation common between SPIR and
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// SPIR-V.
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//===----------------------------------------------------------------------===//
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namespace {
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class CommonSPIRABIInfo : public DefaultABIInfo {
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public:
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CommonSPIRABIInfo(CodeGenTypes &CGT) : DefaultABIInfo(CGT) { setCCs(); }
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private:
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void setCCs();
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};
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class SPIRVABIInfo : public CommonSPIRABIInfo {
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public:
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SPIRVABIInfo(CodeGenTypes &CGT) : CommonSPIRABIInfo(CGT) {}
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void computeInfo(CGFunctionInfo &FI) const override;
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private:
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ABIArgInfo classifyReturnType(QualType RetTy) const;
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ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
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ABIArgInfo classifyArgumentType(QualType Ty) const;
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};
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} // end anonymous namespace
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namespace {
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class CommonSPIRTargetCodeGenInfo : public TargetCodeGenInfo {
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public:
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CommonSPIRTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
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: TargetCodeGenInfo(std::make_unique<CommonSPIRABIInfo>(CGT)) {}
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CommonSPIRTargetCodeGenInfo(std::unique_ptr<ABIInfo> ABIInfo)
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: TargetCodeGenInfo(std::move(ABIInfo)) {}
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LangAS getASTAllocaAddressSpace() const override {
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return getLangASFromTargetAS(
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getABIInfo().getDataLayout().getAllocaAddrSpace());
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}
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unsigned getOpenCLKernelCallingConv() const override;
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llvm::Type *getOpenCLType(CodeGenModule &CGM, const Type *T) const override;
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llvm::Type *getHLSLType(CodeGenModule &CGM, const Type *Ty) const override;
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llvm::Type *getSPIRVImageTypeFromHLSLResource(
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const HLSLAttributedResourceType::Attributes &attributes,
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llvm::Type *ElementType, llvm::LLVMContext &Ctx) const;
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};
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class SPIRVTargetCodeGenInfo : public CommonSPIRTargetCodeGenInfo {
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public:
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SPIRVTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
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: CommonSPIRTargetCodeGenInfo(std::make_unique<SPIRVABIInfo>(CGT)) {}
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void setCUDAKernelCallingConvention(const FunctionType *&FT) const override;
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LangAS getGlobalVarAddressSpace(CodeGenModule &CGM,
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const VarDecl *D) const override;
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llvm::SyncScope::ID getLLVMSyncScopeID(const LangOptions &LangOpts,
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SyncScope Scope,
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llvm::AtomicOrdering Ordering,
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llvm::LLVMContext &Ctx) const override;
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};
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inline StringRef mapClangSyncScopeToLLVM(SyncScope Scope) {
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switch (Scope) {
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case SyncScope::HIPSingleThread:
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case SyncScope::SingleScope:
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return "singlethread";
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case SyncScope::HIPWavefront:
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case SyncScope::OpenCLSubGroup:
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case SyncScope::WavefrontScope:
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return "subgroup";
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case SyncScope::HIPWorkgroup:
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case SyncScope::OpenCLWorkGroup:
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case SyncScope::WorkgroupScope:
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return "workgroup";
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case SyncScope::HIPAgent:
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case SyncScope::OpenCLDevice:
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case SyncScope::DeviceScope:
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return "device";
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case SyncScope::SystemScope:
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case SyncScope::HIPSystem:
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case SyncScope::OpenCLAllSVMDevices:
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return "";
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}
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return "";
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}
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} // End anonymous namespace.
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void CommonSPIRABIInfo::setCCs() {
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assert(getRuntimeCC() == llvm::CallingConv::C);
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RuntimeCC = llvm::CallingConv::SPIR_FUNC;
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}
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ABIArgInfo SPIRVABIInfo::classifyReturnType(QualType RetTy) const {
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if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
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return DefaultABIInfo::classifyReturnType(RetTy);
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if (!isAggregateTypeForABI(RetTy) || getRecordArgABI(RetTy, getCXXABI()))
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return DefaultABIInfo::classifyReturnType(RetTy);
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if (const RecordType *RT = RetTy->getAs<RecordType>()) {
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const RecordDecl *RD = RT->getDecl();
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if (RD->hasFlexibleArrayMember())
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return DefaultABIInfo::classifyReturnType(RetTy);
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}
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// TODO: The AMDGPU ABI is non-trivial to represent in SPIR-V; in order to
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// avoid encoding various architecture specific bits here we return everything
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// as direct to retain type info for things like aggregates, for later perusal
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// when translating back to LLVM/lowering in the BE. This is also why we
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// disable flattening as the outcomes can mismatch between SPIR-V and AMDGPU.
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// This will be revisited / optimised in the future.
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return ABIArgInfo::getDirect(CGT.ConvertType(RetTy), 0u, nullptr, false);
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}
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ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
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if (getContext().getLangOpts().CUDAIsDevice) {
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// Coerce pointer arguments with default address space to CrossWorkGroup
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// pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
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// SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address space.
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llvm::Type *LTy = CGT.ConvertType(Ty);
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auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
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auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
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auto *PtrTy = llvm::dyn_cast<llvm::PointerType>(LTy);
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if (PtrTy && PtrTy->getAddressSpace() == DefaultAS) {
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LTy = llvm::PointerType::get(PtrTy->getContext(), GlobalAS);
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return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
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}
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if (isAggregateTypeForABI(Ty)) {
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if (getTarget().getTriple().getVendor() == llvm::Triple::AMD)
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// TODO: The AMDGPU kernel ABI passes aggregates byref, which is not
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// currently expressible in SPIR-V; SPIR-V passes aggregates byval,
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// which the AMDGPU kernel ABI does not allow. Passing aggregates as
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// direct works around this impedance mismatch, as it retains type info
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// and can be correctly handled, post reverse-translation, by the AMDGPU
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// BE, which has to support this CC for legacy OpenCL purposes. It can
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// be brittle and does lead to performance degradation in certain
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// pathological cases. This will be revisited / optimised in the future,
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// once a way to deal with the byref/byval impedance mismatch is
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// identified.
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return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
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// Force copying aggregate type in kernel arguments by value when
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// compiling CUDA targeting SPIR-V. This is required for the object
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// copied to be valid on the device.
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// This behavior follows the CUDA spec
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// https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-function-argument-processing,
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// and matches the NVPTX implementation.
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return getNaturalAlignIndirect(Ty, /* byval */ true);
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}
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}
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return classifyArgumentType(Ty);
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}
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ABIArgInfo SPIRVABIInfo::classifyArgumentType(QualType Ty) const {
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if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
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return DefaultABIInfo::classifyArgumentType(Ty);
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if (!isAggregateTypeForABI(Ty))
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return DefaultABIInfo::classifyArgumentType(Ty);
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// Records with non-trivial destructors/copy-constructors should not be
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// passed by value.
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if (auto RAA = getRecordArgABI(Ty, getCXXABI()))
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return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
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if (const RecordType *RT = Ty->getAs<RecordType>()) {
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const RecordDecl *RD = RT->getDecl();
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if (RD->hasFlexibleArrayMember())
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return DefaultABIInfo::classifyArgumentType(Ty);
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}
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return ABIArgInfo::getDirect(CGT.ConvertType(Ty), 0u, nullptr, false);
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}
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void SPIRVABIInfo::computeInfo(CGFunctionInfo &FI) const {
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// The logic is same as in DefaultABIInfo with an exception on the kernel
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// arguments handling.
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llvm::CallingConv::ID CC = FI.getCallingConvention();
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if (!getCXXABI().classifyReturnType(FI))
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FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
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for (auto &I : FI.arguments()) {
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if (CC == llvm::CallingConv::SPIR_KERNEL) {
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I.info = classifyKernelArgumentType(I.type);
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} else {
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I.info = classifyArgumentType(I.type);
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}
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}
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}
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namespace clang {
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namespace CodeGen {
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void computeSPIRKernelABIInfo(CodeGenModule &CGM, CGFunctionInfo &FI) {
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if (CGM.getTarget().getTriple().isSPIRV())
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SPIRVABIInfo(CGM.getTypes()).computeInfo(FI);
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else
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CommonSPIRABIInfo(CGM.getTypes()).computeInfo(FI);
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}
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}
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}
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unsigned CommonSPIRTargetCodeGenInfo::getOpenCLKernelCallingConv() const {
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return llvm::CallingConv::SPIR_KERNEL;
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}
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void SPIRVTargetCodeGenInfo::setCUDAKernelCallingConvention(
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const FunctionType *&FT) const {
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// Convert HIP kernels to SPIR-V kernels.
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if (getABIInfo().getContext().getLangOpts().HIP) {
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FT = getABIInfo().getContext().adjustFunctionType(
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FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
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return;
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}
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}
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LangAS
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SPIRVTargetCodeGenInfo::getGlobalVarAddressSpace(CodeGenModule &CGM,
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const VarDecl *D) const {
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assert(!CGM.getLangOpts().OpenCL &&
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!(CGM.getLangOpts().CUDA && CGM.getLangOpts().CUDAIsDevice) &&
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"Address space agnostic languages only");
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// If we're here it means that we're using the SPIRDefIsGen ASMap, hence for
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// the global AS we can rely on either cuda_device or sycl_global to be
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// correct; however, since this is not a CUDA Device context, we use
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// sycl_global to prevent confusion with the assertion.
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LangAS DefaultGlobalAS = getLangASFromTargetAS(
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CGM.getContext().getTargetAddressSpace(LangAS::sycl_global));
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if (!D)
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return DefaultGlobalAS;
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LangAS AddrSpace = D->getType().getAddressSpace();
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if (AddrSpace != LangAS::Default)
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return AddrSpace;
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return DefaultGlobalAS;
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}
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llvm::SyncScope::ID
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SPIRVTargetCodeGenInfo::getLLVMSyncScopeID(const LangOptions &, SyncScope Scope,
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llvm::AtomicOrdering,
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llvm::LLVMContext &Ctx) const {
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return Ctx.getOrInsertSyncScopeID(mapClangSyncScopeToLLVM(Scope));
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}
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/// Construct a SPIR-V target extension type for the given OpenCL image type.
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static llvm::Type *getSPIRVImageType(llvm::LLVMContext &Ctx, StringRef BaseType,
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StringRef OpenCLName,
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unsigned AccessQualifier) {
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// These parameters compare to the operands of OpTypeImage (see
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// https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpTypeImage
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// for more details). The first 6 integer parameters all default to 0, and
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// will be changed to 1 only for the image type(s) that set the parameter to
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// one. The 7th integer parameter is the access qualifier, which is tacked on
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// at the end.
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SmallVector<unsigned, 7> IntParams = {0, 0, 0, 0, 0, 0};
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// Choose the dimension of the image--this corresponds to the Dim enum in
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// SPIR-V (first integer parameter of OpTypeImage).
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if (OpenCLName.starts_with("image2d"))
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IntParams[0] = 1; // 1D
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else if (OpenCLName.starts_with("image3d"))
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IntParams[0] = 2; // 2D
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else if (OpenCLName == "image1d_buffer")
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IntParams[0] = 5; // Buffer
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else
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assert(OpenCLName.starts_with("image1d") && "Unknown image type");
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// Set the other integer parameters of OpTypeImage if necessary. Note that the
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// OpenCL image types don't provide any information for the Sampled or
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// Image Format parameters.
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if (OpenCLName.contains("_depth"))
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IntParams[1] = 1;
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if (OpenCLName.contains("_array"))
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IntParams[2] = 1;
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if (OpenCLName.contains("_msaa"))
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IntParams[3] = 1;
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// Access qualifier
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IntParams.push_back(AccessQualifier);
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return llvm::TargetExtType::get(Ctx, BaseType, {llvm::Type::getVoidTy(Ctx)},
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IntParams);
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}
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llvm::Type *CommonSPIRTargetCodeGenInfo::getOpenCLType(CodeGenModule &CGM,
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const Type *Ty) const {
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llvm::LLVMContext &Ctx = CGM.getLLVMContext();
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if (auto *PipeTy = dyn_cast<PipeType>(Ty))
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return llvm::TargetExtType::get(Ctx, "spirv.Pipe", {},
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{!PipeTy->isReadOnly()});
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if (auto *BuiltinTy = dyn_cast<BuiltinType>(Ty)) {
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enum AccessQualifier : unsigned { AQ_ro = 0, AQ_wo = 1, AQ_rw = 2 };
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switch (BuiltinTy->getKind()) {
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#define IMAGE_TYPE(ImgType, Id, SingletonId, Access, Suffix) \
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case BuiltinType::Id: \
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return getSPIRVImageType(Ctx, "spirv.Image", #ImgType, AQ_##Suffix);
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#include "clang/Basic/OpenCLImageTypes.def"
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case BuiltinType::OCLSampler:
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return llvm::TargetExtType::get(Ctx, "spirv.Sampler");
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case BuiltinType::OCLEvent:
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return llvm::TargetExtType::get(Ctx, "spirv.Event");
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case BuiltinType::OCLClkEvent:
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return llvm::TargetExtType::get(Ctx, "spirv.DeviceEvent");
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case BuiltinType::OCLQueue:
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return llvm::TargetExtType::get(Ctx, "spirv.Queue");
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case BuiltinType::OCLReserveID:
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return llvm::TargetExtType::get(Ctx, "spirv.ReserveId");
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#define INTEL_SUBGROUP_AVC_TYPE(Name, Id) \
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case BuiltinType::OCLIntelSubgroupAVC##Id: \
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return llvm::TargetExtType::get(Ctx, "spirv.Avc" #Id "INTEL");
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#include "clang/Basic/OpenCLExtensionTypes.def"
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default:
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return nullptr;
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}
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}
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return nullptr;
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}
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llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType(CodeGenModule &CGM,
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const Type *Ty) const {
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auto *ResType = dyn_cast<HLSLAttributedResourceType>(Ty);
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if (!ResType)
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return nullptr;
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llvm::LLVMContext &Ctx = CGM.getLLVMContext();
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const HLSLAttributedResourceType::Attributes &ResAttrs = ResType->getAttrs();
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switch (ResAttrs.ResourceClass) {
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case llvm::dxil::ResourceClass::UAV:
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case llvm::dxil::ResourceClass::SRV: {
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// TypedBuffer and RawBuffer both need element type
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QualType ContainedTy = ResType->getContainedType();
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if (ContainedTy.isNull())
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return nullptr;
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assert(!ResAttrs.RawBuffer &&
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"Raw buffers handles are not implemented for SPIR-V yet");
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assert(!ResAttrs.IsROV &&
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"Rasterizer order views not implemented for SPIR-V yet");
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// convert element type
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llvm::Type *ElemType = CGM.getTypes().ConvertType(ContainedTy);
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return getSPIRVImageTypeFromHLSLResource(ResAttrs, ElemType, Ctx);
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}
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case llvm::dxil::ResourceClass::CBuffer:
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llvm_unreachable("CBuffer handles are not implemented for SPIR-V yet");
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break;
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case llvm::dxil::ResourceClass::Sampler:
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return llvm::TargetExtType::get(Ctx, "spirv.Sampler");
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}
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return nullptr;
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}
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llvm::Type *CommonSPIRTargetCodeGenInfo::getSPIRVImageTypeFromHLSLResource(
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const HLSLAttributedResourceType::Attributes &attributes,
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llvm::Type *ElementType, llvm::LLVMContext &Ctx) const {
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if (ElementType->isVectorTy())
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ElementType = ElementType->getScalarType();
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assert((ElementType->isIntegerTy() || ElementType->isFloatingPointTy()) &&
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"The element type for a SPIR-V resource must be a scalar integer or "
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"floating point type.");
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// These parameters correspond to the operands to the OpTypeImage SPIR-V
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// instruction. See
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// https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpTypeImage.
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SmallVector<unsigned, 6> IntParams(6, 0);
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// Dim
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// For now we assume everything is a buffer.
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IntParams[0] = 5;
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// Depth
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// HLSL does not indicate if it is a depth texture or not, so we use unknown.
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IntParams[1] = 2;
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// Arrayed
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IntParams[2] = 0;
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// MS
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IntParams[3] = 0;
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// Sampled
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IntParams[4] =
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attributes.ResourceClass == llvm::dxil::ResourceClass::UAV ? 2 : 1;
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// Image format.
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// Setting to unknown for now.
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IntParams[5] = 0;
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return llvm::TargetExtType::get(Ctx, "spirv.Image", {ElementType}, IntParams);
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}
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std::unique_ptr<TargetCodeGenInfo>
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CodeGen::createCommonSPIRTargetCodeGenInfo(CodeGenModule &CGM) {
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return std::make_unique<CommonSPIRTargetCodeGenInfo>(CGM.getTypes());
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}
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std::unique_ptr<TargetCodeGenInfo>
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CodeGen::createSPIRVTargetCodeGenInfo(CodeGenModule &CGM) {
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return std::make_unique<SPIRVTargetCodeGenInfo>(CGM.getTypes());
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}
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