228f88fdc8
This change implements support for the `cr` and `cf` register constraints (which allocate a RVC GPR or RVC FPR respectively), and the `N` modifier (which prints the raw encoding of a register rather than the name). The intention behind these additions is to make it easier to use inline assembly when assembling raw instructions that are not supported by the compiler, for instance when experimenting with new instructions or when supporting proprietary extensions outside the toolchain. These implement part of my proposal in riscv-non-isa/riscv-c-api-doc#92 As part of the implementation, I felt there was not enough coverage of inline assembly and the "in X" floating-point extensions, so I have added more regression tests around these configurations.
99 lines
3.4 KiB
C
99 lines
3.4 KiB
C
// RUN: %clang_cc1 -triple riscv32 -O2 -emit-llvm %s -o - \
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// RUN: | FileCheck %s
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// RUN: %clang_cc1 -triple riscv64 -O2 -emit-llvm %s -o - \
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// RUN: | FileCheck %s
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// Test RISC-V specific inline assembly constraints and modifiers.
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long test_r(long x) {
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// CHECK-LABEL: define{{.*}} {{i64|i32}} @test_r(
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// CHECK: call {{i64|i32}} asm sideeffect "", "=r,r"({{i64|i32}} %{{.*}})
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long ret;
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asm volatile ("" : "=r"(ret) : "r"(x));
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// CHECK: call {{i64|i32}} asm sideeffect "", "=r,r"({{i64|i32}} %{{.*}})
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asm volatile ("" : "=r"(ret) : "r"(x));
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return ret;
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}
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long test_cr(long x) {
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// CHECK-LABEL: define{{.*}} {{i64|i32}} @test_cr(
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// CHECK: call {{i64|i32}} asm sideeffect "", "=^cr,^cr"({{i64|i32}} %{{.*}})
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long ret;
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asm volatile ("" : "=cr"(ret) : "cr"(x));
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return ret;
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}
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float cf;
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double cd;
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void test_cf(float f, double d) {
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// CHECK-LABEL: define{{.*}} void @test_cf(
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// CHECK: call float asm sideeffect "", "=^cf,^cf"(float %{{.*}})
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asm volatile("" : "=cf"(cf) : "cf"(f));
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// CHECK: call double asm sideeffect "", "=^cf,^cf"(double %{{.*}})
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asm volatile("" : "=cf"(cd) : "cf"(d));
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}
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void test_I(void) {
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// CHECK-LABEL: define{{.*}} void @test_I()
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// CHECK: call void asm sideeffect "", "I"(i32 2047)
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asm volatile ("" :: "I"(2047));
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// CHECK: call void asm sideeffect "", "I"(i32 -2048)
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asm volatile ("" :: "I"(-2048));
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}
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void test_J(void) {
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// CHECK-LABEL: define{{.*}} void @test_J()
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// CHECK: call void asm sideeffect "", "J"(i32 0)
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asm volatile ("" :: "J"(0));
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}
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void test_K(void) {
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// CHECK-LABEL: define{{.*}} void @test_K()
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// CHECK: call void asm sideeffect "", "K"(i32 31)
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asm volatile ("" :: "K"(31));
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// CHECK: call void asm sideeffect "", "K"(i32 0)
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asm volatile ("" :: "K"(0));
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}
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float f;
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double d;
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void test_f(void) {
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// CHECK-LABEL: define{{.*}} void @test_f()
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// CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load float, ptr @f
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// CHECK: call void asm sideeffect "", "f"(float [[FLT_ARG]])
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asm volatile ("" :: "f"(f));
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// CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load double, ptr @d
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// CHECK: call void asm sideeffect "", "f"(double [[FLT_ARG]])
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asm volatile ("" :: "f"(d));
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}
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void test_A(int *p) {
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// CHECK-LABEL: define{{.*}} void @test_A(ptr noundef %p)
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// CHECK: call void asm sideeffect "", "*A"(ptr elementtype(i32) %p)
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asm volatile("" :: "A"(*p));
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}
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extern int var, arr[2][2];
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struct Pair { int a, b; } pair;
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// CHECK-LABEL: test_s(
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// CHECK: call void asm sideeffect "// $0 $1 $2", "s,s,s"(ptr nonnull @var, ptr nonnull getelementptr inbounds (i8, ptr @arr, {{.*}}), ptr nonnull @test_s)
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// CHECK: call void asm sideeffect "// $0", "s"(ptr nonnull getelementptr inbounds nuw (i8, ptr @pair, {{.*}}))
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// CHECK: call void asm sideeffect "// $0 $1 $2", "S,S,S"(ptr nonnull @var, ptr nonnull getelementptr inbounds (i8, ptr @arr, {{.*}}), ptr nonnull @test_s)
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void test_s(void) {
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asm("// %0 %1 %2" :: "s"(&var), "s"(&arr[1][1]), "s"(test_s));
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asm("// %0" :: "s"(&pair.b));
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asm("// %0 %1 %2" :: "S"(&var), "S"(&arr[1][1]), "S"(test_s));
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}
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// CHECK-LABEL: test_modifiers(
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// CHECK: call void asm sideeffect "// ${0:i} ${1:i}", "r,r"({{i32|i64}} %val, i32 37)
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// CHECK: call void asm sideeffect "// ${0:z} ${1:z}", "i,i"(i32 0, i32 1)
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// CHECK: call void asm sideeffect "// ${0:N}", "r"({{i32|i64}} %val)
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void test_modifiers(long val) {
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asm volatile("// %i0 %i1" :: "r"(val), "r"(37));
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asm volatile("// %z0 %z1" :: "i"(0), "i"(1));
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asm volatile("// %N0" :: "r"(val));
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}
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