llvm-project/clang/test/CodeGen/extend-arg-64.c
Mariya Podchishchaeva 9ad72df55c
[clang] Use different memory layout type for _BitInt(N) in LLVM IR (#91364)
There are two problems with _BitInt prior to this patch:
1. For at least some values of N, we cannot use LLVM's iN for the type
of struct elements, array elements, allocas, global variables, and so
on, because the LLVM layout for that type does not match the high-level
layout of _BitInt(N).
Example: Currently for i128:128 targets correct implementation is
possible either for __int128 or for _BitInt(129+) with lowering to iN,
but not both, since we have now correct implementation of __int128 in
place after a21abc7.
When this happens, opaque [M x i8] types used, where M =
sizeof(_BitInt(N)).
2. LLVM doesn't guarantee any particular extension behavior for integer
types that aren't a multiple of 8. For this reason, all _BitInt types
are now have in-memory representation that is a whole number of bytes.
I.e. for example _BitInt(17) now will have memory layout type i32.

This patch also introduces concept of load/store type and adds an API to
CodeGenTypes that returns the IR type that should be used for load and
store operations. This is particularly useful for the case when a
_BitInt ends up having array of bytes as memory layout type. For
_BitInt(N), let M = sizeof(_BitInt(N)), and let BITS = M * 8. Loads and
stores of iM would both (1) produce far better code from the backends
and (2) be far more optimizable by IR passes than loads and stores of [M
x i8].

Fixes https://github.com/llvm/llvm-project/issues/85139
Fixes https://github.com/llvm/llvm-project/issues/83419

---------

Co-authored-by: John McCall <rjmccall@gmail.com>
2024-07-15 09:40:39 +02:00

111 lines
3.7 KiB
C

// RUN: %clang_cc1 -DD128 -triple x86_64-apple-darwin -fextend-arguments=64 \
// RUN: -Wno-strict-prototypes %s -emit-llvm -o - | FileCheck %s -check-prefix=CHECKEXT
// When the option isn't selected, no effect
// RUN: %clang_cc1 -DD128 -triple x86_64-apple-darwin \
// RUN: -Wno-strict-prototypes %s -emit-llvm -o - | FileCheck %s \
// RUN: --implicit-check-not "ext {{.*}}to i64"
// The option isn't supported on x86, no effect
// RUN: %clang_cc1 -triple i386-pc-linux-gnu -fextend-arguments=64 \
// RUN: -Wno-strict-prototypes %s -emit-llvm -o - | FileCheck %s \
// RUN: --implicit-check-not "ext {{.*}}to i64"
// The option isn't supported on ppc, no effect
// RUN: %clang_cc1 -triple ppc64le -fextend-arguments=64 \
// RUN: -Wno-strict-prototypes %s -emit-llvm -o - | FileCheck %s \
// RUN: --implicit-check-not "ext {{.*}}to i64"
// The option isn't supported on ppc, no effect
// RUN: %clang_cc1 -DD128 -triple powerpc64-ibm-aix-xcoff -fextend-arguments=64 \
// RUN: -Wno-strict-prototypes %s -emit-llvm -o - | FileCheck %s \
// RUN: --implicit-check-not "ext {{.*}}to i64"
int vararg(int, ...);
void knr();
unsigned int u32;
int s32;
unsigned short u16;
short s16;
unsigned char u8;
signed char s8;
long long ll;
_BitInt(23) ei23;
float ff;
double dd;
#ifdef D128
__int128 i128;
#endif
int test(void) {
// CHECK: define{{.*}} i32 @test{{.*}}
// CHECKEXT: [[TAG_u32:%.*]] = load i32, ptr @u32{{.*}}
// CHECKEXT: [[CONV_u32:%.*]] = zext i32 [[TAG_u32]] to i64
// CHECKEXT: [[TAG_s32:%.*]] = load i32, ptr @s32
// CHECKEXT: [[CONV_s32:%.*]] = sext i32 [[TAG_s32]] to i64
// CHECKEXT: [[TAG_u16:%.*]] = load i16, ptr @u16
// CHECKEXT: [[CONV_u16:%.*]] = zext i16 [[TAG_u16]] to i64
// CHECKEXT: [[TAG_s16:%.*]] = load i16, ptr @s16
// CHECKEXT: [[CONV_s16:%.*]] = sext i16 [[TAG_s16]] to i64
// CHECKEXT: [[TAG_u8:%.*]] = load i8, ptr @u8
// CHECKEXT: [[CONV_u8:%.*]] = zext i8 [[TAG_u8]] to i64
// CHECKEXT: [[TAG_s8:%.*]] = load i8, ptr @s8
// CHECKEXT: [[CONV_s8:%.*]] = sext i8 [[TAG_s8]] to i64
// CHECKEXT: call{{.*}} @vararg(i32 noundef %0, i64 noundef [[CONV_u32]], i64 noundef [[CONV_s32]], i64 noundef [[CONV_u16]], i64 noundef [[CONV_s16]], i64 noundef [[CONV_u8]], i64 noundef [[CONV_s8]]
int sum = 0;
sum = vararg(sum, u32, s32, u16, s16, u8, s8);
knr(ll);
// CHECKEXT: load i64, ptr @ll
// CHECKEXT-NEXT: call void (i64, ...) @knr
knr(ei23);
// CHECKEXT: load i32, ptr @ei23
// CHECKEXT: trunc i32
// CHECKEXT-NEXT: call void (i23, ...) @knr
knr(ff);
// CHECKEXT: load float
// CHECKEXT-NEXT: fpext float {{.*}} to double
// CHECKEXT-NEXT: call{{.*}} void (double, ...) @knr
knr(dd);
// CHECKEXT: load double
// CHECKEXT-NEXT: call{{.*}} void (double, ...) @knr
#ifdef D128
knr(i128);
// CHECKEXT: load i128
// CHECKEXT: call{{.*}} void (i64, i64, ...) @knr
#endif
knr(u32, s32, u16, s16, u8, s8);
// CHECKEXT: [[TAg_u32:%.*]] = load i32, ptr @u32{{.*}}
// CHECKEXT: [[CONv_u32:%.*]] = zext i32 [[TAg_u32]] to i64
// CHECKEXT: [[TAg_s32:%.*]] = load i32, ptr @s32
// CHECKEXT: [[CONv_s32:%.*]] = sext i32 [[TAg_s32]] to i64
// CHECKEXT: [[TAg_u16:%.*]] = load i16, ptr @u16
// CHECKEXT: [[CONv_u16:%.*]] = zext i16 [[TAg_u16]] to i64
// CHECKEXT: [[TAg_s16:%.*]] = load i16, ptr @s16
// CHECKEXT: [[CONv_s16:%.*]] = sext i16 [[TAg_s16]] to i64
// CHECKEXT: [[TAg_u8:%.*]] = load i8, ptr @u8
// CHECKEXT: [[CONv_u8:%.*]] = zext i8 [[TAg_u8]] to i64
// CHECKEXT: [[TAg_s8:%.*]] = load i8, ptr @s8
// CHECKEXT: [[CONv_s8:%.*]] = sext i8 [[TAg_s8]] to i64
// CHECKEXT: call{{.*}} void (i64, i64, i64, i64, i64, i64, ...) @knr
return sum;
}