435e58468a
The 'allocator' modifier is now accepted in the 'allocate' clause. Added LIT tests covering codegen, PCH, template handling, and serialization for 'allocator' modifier. Added support for allocator-modifier to release notes. Testing - New allocate modifier LIT tests. - OpenMP LIT tests. - check-all - relevant sollve_vv test cases tests/5.2/scope/test_scope_allocate_construct.c
256 lines
14 KiB
C++
256 lines
14 KiB
C++
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ --version 5
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix CHECK-TLS %s
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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enum omp_allocator_handle_t {
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omp_null_allocator = 0,
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omp_default_mem_alloc = 1,
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omp_large_cap_mem_alloc = 2,
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omp_const_mem_alloc = 3,
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omp_high_bw_mem_alloc = 4,
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omp_low_lat_mem_alloc = 5,
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omp_cgroup_mem_alloc = 6,
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omp_pteam_mem_alloc = 7,
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omp_thread_mem_alloc = 8,
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KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__
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};
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template <class T>
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struct ST {
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static T m;
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};
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template <class T, omp_allocator_handle_t TY> T foo() {
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T v;
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#pragma omp scope private(v) allocate(allocator(TY):v)
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v = ST<T>::m;
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return v;
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}
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namespace ns {
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int a;
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}
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int main() {
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static int a;
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static int temp;
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#pragma omp scope private(ns::a) allocate(allocator(omp_pteam_mem_alloc):ns::a)
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ns::a++;
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#pragma omp scope private(a) allocate(allocator(omp_thread_mem_alloc):a)
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a = 2;
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double b = 3;
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#pragma omp scope private(temp) allocate(temp)
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temp += foo<int, omp_cgroup_mem_alloc>();
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return temp+ns::a;
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}
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extern template int ST<int>::m;
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int b;
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void bar(int a, float &z) {
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#pragma omp scope private(a,z) allocate(allocator(omp_default_mem_alloc):a,z)
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a += b;
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}
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#endif
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// CHECK-LABEL: define dso_local noundef i32 @main(
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// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[B:%.*]] = alloca double, align 8
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
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// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4
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// CHECK-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 7 to ptr))
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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// CHECK-NEXT: store i32 [[INC]], ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 7 to ptr))
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// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP0]])
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// CHECK-NEXT: [[DOTA__VOID_ADDR1:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 8 to ptr))
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// CHECK-NEXT: store i32 2, ptr [[DOTA__VOID_ADDR1]], align 4
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// CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR1]], ptr inttoptr (i64 8 to ptr))
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// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-NEXT: store double 3.000000e+00, ptr [[B]], align 8
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// CHECK-NEXT: [[DOTTEMP__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr null)
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// CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v()
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// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTEMP__VOID_ADDR]], align 4
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// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[CALL]]
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// CHECK-NEXT: store i32 [[ADD]], ptr [[DOTTEMP__VOID_ADDR]], align 4
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// CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTTEMP__VOID_ADDR]], ptr null)
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// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @_ZZ4mainE4temp, align 4
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// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZN2ns1aE, align 4
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// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[TMP4]]
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// CHECK-NEXT: ret i32 [[ADD2]]
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//
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//
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// CHECK-LABEL: define linkonce_odr noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v(
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// CHECK-SAME: ) #[[ATTR3:[0-9]+]] comdat {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[V1:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @_ZN2STIiE1mE, align 4
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// CHECK-NEXT: store i32 [[TMP1]], ptr [[V1]], align 4
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// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[V]], align 4
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// CHECK-NEXT: ret i32 [[TMP2]]
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//
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//
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// CHECK-LABEL: define dso_local void @_Z3bariRf(
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// CHECK-SAME: i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Z:%.*]]) #[[ATTR3]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[Z_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[TMP:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
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// CHECK-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store ptr [[Z]], ptr [[Z_ADDR]], align 8
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// CHECK-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
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// CHECK-NEXT: [[DOTZ__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
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// CHECK-NEXT: store ptr [[DOTZ__VOID_ADDR]], ptr [[TMP]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @b, align 4
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// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]]
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// CHECK-NEXT: store i32 [[ADD]], ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTZ__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
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// CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
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// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-NEXT: ret void
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//
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//
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// CHECK-TLS-LABEL: define dso_local noundef i32 @main(
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// CHECK-TLS-SAME: ) #[[ATTR0:[0-9]+]] {
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// CHECK-TLS-NEXT: [[ENTRY:.*:]]
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// CHECK-TLS-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
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// CHECK-TLS-NEXT: [[B:%.*]] = alloca double, align 8
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// CHECK-TLS-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
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// CHECK-TLS-NEXT: store i32 0, ptr [[RETVAL]], align 4
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// CHECK-TLS-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 7 to ptr))
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// CHECK-TLS-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-TLS-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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// CHECK-TLS-NEXT: store i32 [[INC]], ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 7 to ptr))
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// CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP0]])
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// CHECK-TLS-NEXT: [[DOTA__VOID_ADDR1:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 8 to ptr))
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// CHECK-TLS-NEXT: store i32 2, ptr [[DOTA__VOID_ADDR1]], align 4
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// CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR1]], ptr inttoptr (i64 8 to ptr))
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// CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-TLS-NEXT: store double 3.000000e+00, ptr [[B]], align 8
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// CHECK-TLS-NEXT: [[DOTTEMP__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr null)
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// CHECK-TLS-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v()
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// CHECK-TLS-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTEMP__VOID_ADDR]], align 4
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// CHECK-TLS-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[CALL]]
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// CHECK-TLS-NEXT: store i32 [[ADD]], ptr [[DOTTEMP__VOID_ADDR]], align 4
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// CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTTEMP__VOID_ADDR]], ptr null)
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// CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-TLS-NEXT: [[TMP3:%.*]] = load i32, ptr @_ZZ4mainE4temp, align 4
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// CHECK-TLS-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZN2ns1aE, align 4
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// CHECK-TLS-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[TMP4]]
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// CHECK-TLS-NEXT: ret i32 [[ADD2]]
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//
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//
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// CHECK-TLS-LABEL: define linkonce_odr noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v(
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// CHECK-TLS-SAME: ) #[[ATTR3:[0-9]+]] comdat {
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// CHECK-TLS-NEXT: [[ENTRY:.*:]]
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// CHECK-TLS-NEXT: [[V:%.*]] = alloca i32, align 4
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// CHECK-TLS-NEXT: [[V1:%.*]] = alloca i32, align 4
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// CHECK-TLS-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
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// CHECK-TLS-NEXT: [[TMP1:%.*]] = load i32, ptr @_ZN2STIiE1mE, align 4
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// CHECK-TLS-NEXT: store i32 [[TMP1]], ptr [[V1]], align 4
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// CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-TLS-NEXT: [[TMP2:%.*]] = load i32, ptr [[V]], align 4
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// CHECK-TLS-NEXT: ret i32 [[TMP2]]
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//
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//
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// CHECK-TLS-LABEL: define dso_local void @_Z3bariRf(
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// CHECK-TLS-SAME: i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Z:%.*]]) #[[ATTR3]] {
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// CHECK-TLS-NEXT: [[ENTRY:.*:]]
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// CHECK-TLS-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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// CHECK-TLS-NEXT: [[Z_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-TLS-NEXT: [[TMP:%.*]] = alloca ptr, align 8
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// CHECK-TLS-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
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// CHECK-TLS-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
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// CHECK-TLS-NEXT: store ptr [[Z]], ptr [[Z_ADDR]], align 8
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// CHECK-TLS-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
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// CHECK-TLS-NEXT: [[DOTZ__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
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// CHECK-TLS-NEXT: store ptr [[DOTZ__VOID_ADDR]], ptr [[TMP]], align 8
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// CHECK-TLS-NEXT: [[TMP1:%.*]] = load i32, ptr @b, align 4
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// CHECK-TLS-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-TLS-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]]
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// CHECK-TLS-NEXT: store i32 [[ADD]], ptr [[DOTA__VOID_ADDR]], align 4
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// CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTZ__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
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// CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
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// CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
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// CHECK-TLS-NEXT: ret void
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//
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//
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// SIMD-ONLY0-LABEL: define dso_local noundef i32 @main(
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// SIMD-ONLY0-SAME: ) #[[ATTR0:[0-9]+]] {
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// SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
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// SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: [[A:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: [[A1:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: [[B:%.*]] = alloca double, align 8
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// SIMD-ONLY0-NEXT: [[TEMP:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4
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// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
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// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
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// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[A]], align 4
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// SIMD-ONLY0-NEXT: store i32 2, ptr [[A1]], align 4
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// SIMD-ONLY0-NEXT: store double 3.000000e+00, ptr [[B]], align 8
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// SIMD-ONLY0-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v()
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// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[TEMP]], align 4
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// SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
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// SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[TEMP]], align 4
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// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr @_ZZ4mainE4temp, align 4
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// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load i32, ptr @_ZN2ns1aE, align 4
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// SIMD-ONLY0-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP2]], [[TMP3]]
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// SIMD-ONLY0-NEXT: ret i32 [[ADD2]]
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//
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//
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// SIMD-ONLY0-LABEL: define linkonce_odr noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v(
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// SIMD-ONLY0-SAME: ) #[[ATTR1:[0-9]+]] comdat {
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// SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
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// SIMD-ONLY0-NEXT: [[V:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: [[V1:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr @_ZN2STIiE1mE, align 4
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// SIMD-ONLY0-NEXT: store i32 [[TMP0]], ptr [[V1]], align 4
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// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[V]], align 4
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// SIMD-ONLY0-NEXT: ret i32 [[TMP1]]
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//
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//
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// SIMD-ONLY0-LABEL: define dso_local void @_Z3bariRf(
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// SIMD-ONLY0-SAME: i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Z:%.*]]) #[[ATTR1]] {
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// SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
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// SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: [[Z_ADDR:%.*]] = alloca ptr, align 8
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// SIMD-ONLY0-NEXT: [[A1:%.*]] = alloca i32, align 4
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// SIMD-ONLY0-NEXT: [[Z2:%.*]] = alloca float, align 4
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// SIMD-ONLY0-NEXT: [[TMP:%.*]] = alloca ptr, align 8
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// SIMD-ONLY0-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
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// SIMD-ONLY0-NEXT: store ptr [[Z]], ptr [[Z_ADDR]], align 8
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// SIMD-ONLY0-NEXT: store ptr [[Z2]], ptr [[TMP]], align 8
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// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr @b, align 4
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// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[A1]], align 4
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// SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP0]]
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// SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[A1]], align 4
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// SIMD-ONLY0-NEXT: ret void
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//
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