fc9cd3272b
Resume and exit values for inductions are currently still created outside of VPlan and independent of the induction recipes. Don't add live-outs for now, as the additional unneeded users can pessimize other anlysis. Fixes https://github.com/llvm/llvm-project/issues/98660.
82 lines
3.2 KiB
LLVM
82 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -p loop-vectorize -S %s | FileCheck %s
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target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx"
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define i32 @ephemeral_load_and_compare_iv_used_outside(ptr %start, ptr %end) #0 {
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; CHECK-LABEL: define i32 @ephemeral_load_and_compare_iv_used_outside(
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; CHECK-SAME: ptr [[START:%.*]], ptr [[END:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[IV_NEXT]] = getelementptr nusw i8, ptr [[IV]], i64 -8
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; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[IV]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[L1]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq ptr [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi ptr [ [[IV]], %[[LOOP]] ]
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; CHECK-NEXT: [[FINAL_LOAD:%.*]] = load i32, ptr [[IV_LCSSA]], align 4
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; CHECK-NEXT: ret i32 [[FINAL_LOAD]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi ptr [ %start, %entry ],[ %iv.next, %loop ]
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%iv.next = getelementptr nusw i8, ptr %iv, i64 -8
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%l1 = load i32, ptr %iv, align 4
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%cmp = icmp ne i32 %l1, 0
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call void @llvm.assume(i1 %cmp)
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%cmp.not = icmp eq ptr %iv, %end
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br i1 %cmp.not, label %exit, label %loop
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exit:
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%final.load = load i32, ptr %iv, align 4
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ret i32 %final.load
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}
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define i32 @ephemeral_load_and_compare_another_load_used_outside(ptr %start, ptr %end) #0 {
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; CHECK-LABEL: define i32 @ephemeral_load_and_compare_another_load_used_outside(
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; CHECK-SAME: ptr [[START:%.*]], ptr [[END:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[IV_NEXT2:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[IV_NEXT2]] = getelementptr nusw i8, ptr [[IV]], i64 -8
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; CHECK-NEXT: [[L1:%.*]] = load ptr, ptr [[END]], align 8
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; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[L1]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[L2]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq ptr [[IV]], [[END]]
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; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[L1_LCSSA:%.*]] = phi ptr [ [[L1]], %[[LOOP]] ]
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; CHECK-NEXT: [[FINAL_LOAD:%.*]] = load i32, ptr [[L1_LCSSA]], align 4
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; CHECK-NEXT: ret i32 [[FINAL_LOAD]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi ptr [ %start, %entry ], [ %iv.next2, %loop ]
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%iv.next2 = getelementptr nusw i8, ptr %iv, i64 -8
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%l1 = load ptr, ptr %end, align 8
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%l2 = load i32, ptr %l1, align 4
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%cmp = icmp ne i32 %l2, 0
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call void @llvm.assume(i1 %cmp)
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%cmp.not = icmp eq ptr %iv, %end
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br i1 %cmp.not, label %exit, label %loop
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exit:
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%final.load = load i32, ptr %l1, align 4
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ret i32 %final.load
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}
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declare void @llvm.assume(i1 noundef)
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attributes #0 = { "target-cpu"="skylake-avx512" }
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