68210c7c26
IF only the first lane of the result is used, only generate the first lane. Fixes https://github.com/llvm/llvm-project/issues/111042.
119 lines
5.9 KiB
LLVM
119 lines
5.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -S %s | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Test case for https://github.com/llvm/llvm-project/issues/111042.
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define void @replicate_udiv_with_only_first_lane_used(i32 %x, ptr %dst, i64 %d) {
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; CHECK-LABEL: define void @replicate_udiv_with_only_first_lane_used(
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; CHECK-SAME: i32 [[X:%.*]], ptr [[DST:%.*]], i64 [[D:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X]], 10
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_UDIV_CONTINUE14:.*]] ]
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF:.*]], label %[[PRED_UDIV_CONTINUE:.*]]
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; CHECK: [[PRED_UDIV_IF]]:
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; CHECK-NEXT: [[TMP0:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE]]
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; CHECK: [[PRED_UDIV_CONTINUE]]:
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; CHECK-NEXT: [[TMP1:%.*]] = phi i64 [ poison, %[[VECTOR_BODY]] ], [ [[TMP0]], %[[PRED_UDIV_IF]] ]
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF1:.*]], label %[[PRED_UDIV_CONTINUE2:.*]]
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; CHECK: [[PRED_UDIV_IF1]]:
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; CHECK-NEXT: [[TMP2:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE2]]
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; CHECK: [[PRED_UDIV_CONTINUE2]]:
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF3:.*]], label %[[PRED_UDIV_CONTINUE4:.*]]
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; CHECK: [[PRED_UDIV_IF3]]:
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; CHECK-NEXT: [[TMP3:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE4]]
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; CHECK: [[PRED_UDIV_CONTINUE4]]:
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF5:.*]], label %[[PRED_UDIV_CONTINUE6:.*]]
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; CHECK: [[PRED_UDIV_IF5]]:
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; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE6]]
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; CHECK: [[PRED_UDIV_CONTINUE6]]:
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF7:.*]], label %[[PRED_UDIV_CONTINUE8:.*]]
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; CHECK: [[PRED_UDIV_IF7]]:
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; CHECK-NEXT: [[TMP5:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE8]]
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; CHECK: [[PRED_UDIV_CONTINUE8]]:
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; CHECK-NEXT: [[TMP6:%.*]] = phi i64 [ poison, %[[PRED_UDIV_CONTINUE6]] ], [ [[TMP5]], %[[PRED_UDIV_IF7]] ]
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF9:.*]], label %[[PRED_UDIV_CONTINUE10:.*]]
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; CHECK: [[PRED_UDIV_IF9]]:
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; CHECK-NEXT: [[TMP7:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE10]]
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; CHECK: [[PRED_UDIV_CONTINUE10]]:
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF11:.*]], label %[[PRED_UDIV_CONTINUE12:.*]]
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; CHECK: [[PRED_UDIV_IF11]]:
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; CHECK-NEXT: [[TMP8:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE12]]
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; CHECK: [[PRED_UDIV_CONTINUE12]]:
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; CHECK-NEXT: br i1 false, label %[[PRED_UDIV_IF13:.*]], label %[[PRED_UDIV_CONTINUE14]]
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; CHECK: [[PRED_UDIV_IF13]]:
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; CHECK-NEXT: [[TMP9:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE14]]
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; CHECK: [[PRED_UDIV_CONTINUE14]]:
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; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 true, i64 0, i64 [[TMP1]]
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; CHECK-NEXT: [[PREDPHI15:%.*]] = select i1 true, i64 0, i64 [[TMP6]]
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; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i16, ptr [[DST]], i64 [[PREDPHI]]
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; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i16, ptr [[DST]], i64 [[PREDPHI15]]
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; CHECK-NEXT: store i16 0, ptr [[TMP10]], align 2
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; CHECK-NEXT: store i16 0, ptr [[TMP11]], align 2
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
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; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96
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; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 96, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: br i1 true, label %[[LOOP_LATCH]], label %[[ELSE:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: [[DIV_I:%.*]] = udiv i64 99, [[D]]
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; CHECK-NEXT: br label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[RETVAL_0_I:%.*]] = phi i64 [ [[DIV_I]], %[[ELSE]] ], [ 0, %[[LOOP_HEADER]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr [[DST]], i64 [[RETVAL_0_I]]
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; CHECK-NEXT: store i16 0, ptr [[GEP]], align 2
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], 101
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%c = icmp eq i32 %x, 10
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br label %loop.header
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loop.header: ; preds = %loop.latch, %entry
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 true, label %loop.latch, label %else
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else:
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%div.i = udiv i64 99, %d
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br label %loop.latch
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loop.latch:
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%retval.0.i = phi i64 [ %div.i, %else ], [ 0, %loop.header ]
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%gep = getelementptr i16, ptr %dst, i64 %retval.0.i
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store i16 0, ptr %gep, align 2
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%iv.next = add i64 %iv, 1
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%cmp = icmp ult i64 %iv.next, 101
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br i1 %cmp, label %loop.header, label %exit
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exit:
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ret void
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}
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;.
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; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
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; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
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; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
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;.
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