d77067d08a
This adds support for using dominating conditions in computeKnownBits() when called from InstCombine. The implementation uses a DomConditionCache, which stores which branches may provide information that is relevant for a given value. DomConditionCache is similar to AssumptionCache, but does not try to do any kind of automatic tracking. Relevant branches have to be explicitly registered and invalidated values explicitly removed. The necessary tracking is done inside InstCombine. The reason why this doesn't just do exactly the same thing as AssumptionCache is that a lot more transforms touch branches and branch conditions than assumptions. AssumptionCache is an immutable analysis and mostly gets away with this because only a handful of places have to register additional assumptions (mostly as a result of cloning). This is very much not the case for branches. This change regresses compile-time by about ~0.2%. It also improves stage2-O0-g builds by about ~0.2%, which indicates that this change results in additional optimizations inside clang itself. Fixes https://github.com/llvm/llvm-project/issues/74242.
137 lines
4.7 KiB
LLVM
137 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes='default<O3>' -rotation-max-header-size=0 -S < %s | FileCheck %s --check-prefix=HOIST
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; RUN: opt -passes='default<O3>' -rotation-max-header-size=1 -S < %s | FileCheck %s --check-prefix=HOIST
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; RUN: opt -passes='default<O3>' -rotation-max-header-size=2 -S < %s | FileCheck %s --check-prefix=ROTATE
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; RUN: opt -passes='default<O3>' -rotation-max-header-size=3 -S < %s | FileCheck %s --check-prefix=ROTATE
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; This example is produced from a very basic C code:
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;
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; void f0();
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; void f1();
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; void f2();
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;
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; void loop(int width) {
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; if(width < 1)
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; return;
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; for(int i = 0; i < width - 1; ++i) {
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; f0();
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; f1();
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; }
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; f0();
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; f2();
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; }
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; We have a choice here. We can either
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; * hoist the f0() call into loop header,
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; * which potentially makes loop rotation unprofitable since loop header might
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; have grown above certain threshold, and such unrotated loops will be
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; ignored by LoopVectorizer, preventing vectorization
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; * or loop rotation will succeed, resulting in some weird PHIs that will also
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; harm vectorization
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; * or not hoist f0() call before performing loop rotation,
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; at the cost of potential code bloat and/or potentially successfully rotating
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; the loops, vectorizing them at the cost of compile time.
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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declare void @f0()
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declare void @f1()
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declare void @f2()
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declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
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declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
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define void @_Z4loopi(i32 %width) {
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; HOIST-LABEL: @_Z4loopi(
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; HOIST-NEXT: entry:
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; HOIST-NEXT: [[CMP:%.*]] = icmp slt i32 [[WIDTH:%.*]], 1
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; HOIST-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[FOR_COND_PREHEADER:%.*]]
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; HOIST: for.cond.preheader:
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; HOIST-NEXT: [[SUB:%.*]] = add nsw i32 [[WIDTH]], -1
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; HOIST-NEXT: br label [[FOR_COND:%.*]]
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; HOIST: for.cond:
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; HOIST-NEXT: [[I_0:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[FOR_COND_PREHEADER]] ]
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; HOIST-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[I_0]], [[SUB]]
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; HOIST-NEXT: tail call void @f0()
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; HOIST-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
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; HOIST: for.cond.cleanup:
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; HOIST-NEXT: tail call void @f2()
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; HOIST-NEXT: br label [[RETURN]]
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; HOIST: for.body:
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; HOIST-NEXT: tail call void @f1()
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; HOIST-NEXT: [[INC]] = add nuw i32 [[I_0]], 1
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; HOIST-NEXT: br label [[FOR_COND]]
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; HOIST: return:
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; HOIST-NEXT: ret void
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;
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; ROTATE-LABEL: @_Z4loopi(
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; ROTATE-NEXT: entry:
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; ROTATE-NEXT: [[CMP:%.*]] = icmp slt i32 [[WIDTH:%.*]], 1
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; ROTATE-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[FOR_COND_PREHEADER:%.*]]
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; ROTATE: for.cond.preheader:
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; ROTATE-NEXT: [[CMP13_NOT:%.*]] = icmp eq i32 [[WIDTH]], 1
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; ROTATE-NEXT: br i1 [[CMP13_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
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; ROTATE: for.body.preheader:
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; ROTATE-NEXT: [[TMP0:%.*]] = add nsw i32 [[WIDTH]], -2
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; ROTATE-NEXT: br label [[FOR_BODY:%.*]]
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; ROTATE: for.cond.cleanup:
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; ROTATE-NEXT: tail call void @f0()
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; ROTATE-NEXT: tail call void @f2()
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; ROTATE-NEXT: br label [[RETURN]]
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; ROTATE: for.body:
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; ROTATE-NEXT: [[I_04:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]
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; ROTATE-NEXT: tail call void @f0()
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; ROTATE-NEXT: tail call void @f1()
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; ROTATE-NEXT: [[INC]] = add nuw nsw i32 [[I_04]], 1
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; ROTATE-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[I_04]], [[TMP0]]
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; ROTATE-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]]
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; ROTATE: return:
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; ROTATE-NEXT: ret void
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;
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entry:
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%width.addr = alloca i32, align 4
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%i = alloca i32, align 4
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store i32 %width, ptr %width.addr, align 4
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%i1 = load i32, ptr %width.addr, align 4
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%cmp = icmp slt i32 %i1, 1
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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br label %return
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if.end:
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call void @llvm.lifetime.start.p0(i64 4, ptr %i)
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store i32 0, ptr %i, align 4
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br label %for.cond
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for.cond:
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%i3 = load i32, ptr %i, align 4
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%i4 = load i32, ptr %width.addr, align 4
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%sub = sub nsw i32 %i4, 1
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%cmp1 = icmp slt i32 %i3, %sub
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br i1 %cmp1, label %for.body, label %for.cond.cleanup
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for.cond.cleanup:
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call void @llvm.lifetime.end.p0(i64 4, ptr %i)
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br label %for.end
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for.body:
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call void @f0()
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call void @f1()
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br label %for.inc
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for.inc:
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%i6 = load i32, ptr %i, align 4
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%inc = add nsw i32 %i6, 1
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store i32 %inc, ptr %i, align 4
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br label %for.cond
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for.end:
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call void @f0()
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call void @f2()
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br label %return
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return:
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ret void
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}
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