Evan Cheng 6eb516dbea Do not model all INLINEASM instructions as having unmodelled side effects. ...

Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.

llvm-svn: 123044

2011-01-07 23:50:32 +00:00

..

Alpha

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

ARM

Lower some BUILD_VECTORS using VEXT+shuffle.

2011-01-07 21:37:30 +00:00

Blackfin

Remove TargetInstrInfo::copyRegToReg entirely.

2010-07-11 17:01:17 +00:00

CBackend

Eliminate more uses of llvm-as and llvm-dis.

2009-09-09 00:09:15 +00:00

CellSPU

Don't feed 19 bit immediates to ILA.

2010-12-17 09:36:09 +00:00

CPP

fix PR5295 where the .ll parser didn't reject a function after a global

2009-10-25 23:22:50 +00:00

Generic

Add a testcase for PR8582, which mysteriously fixed itself, in case the problem

2011-01-06 23:04:29 +00:00

MBlaze

Lower the MBlaze target specific calling conventions for "interrupt_handler"

2010-12-15 20:27:28 +00:00

Mips

Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka

2010-12-09 17:32:30 +00:00

MSP430

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

PowerPC

Restore the behavior of frame lowering before my refactoring.

2010-12-18 19:53:14 +00:00

PTX

ptx: remove reg-reg addressing mode and st.const

2011-01-01 11:58:58 +00:00

SPARC

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

SystemZ

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

Thumb

Thumb1 had two patterns for the same load-from-constant-pool instruction.

2010-12-15 23:52:36 +00:00

Thumb2

Add ARM patterns to match EXTRACT_SUBVECTOR nodes.

2011-01-07 04:59:04 +00:00

X86

Do not model all INLINEASM instructions as having unmodelled side effects.

2011-01-07 23:50:32 +00:00

XCore

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

thumb2-mul.ll

Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes

2010-09-21 22:51:46 +00:00