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Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/Transforms/VectorCombine/X86
History
Sanjay Patel 0b98a59fed [VectorCombine] add tests for vector loads; NFC
2020-08-18 16:23:33 -04:00
..
extract-binop.ll
[VectorCombine] add/use pass-level IRBuilder
2020-06-22 09:01:29 -04:00
extract-cmp-binop.ll
[VectorCombine] try to form vector compare and binop to eliminate scalar ops
2020-06-29 10:38:52 -04:00
extract-cmp.ll
[VectorCombine] improve IR debugging by providing/salvaging value names
2020-06-22 08:35:47 -04:00
insert-binop-with-constant.ll
[VectorCombine] scalarizeBinop - support an all-constant src vector operand
2020-06-09 19:02:05 +01:00
insert-binop.ll
[VectorCombine] forward walk through instructions to improve chaining of transforms
2020-05-16 13:08:01 -04:00
lit.local.cfg
…
load.ll
[VectorCombine] add tests for vector loads; NFC
2020-08-18 16:23:33 -04:00
no-sse.ll
[VectorCombine] early exit if target has no vector registers
2020-08-12 09:22:31 -04:00
scalarize-cmp.ll
[VectorCombine] fix assert for type of compare operand
2020-06-20 15:20:17 -04:00
shuffle.ll
[VectorCombine] add helper to replace uses and rename
2020-06-22 09:58:49 -04:00
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