6fb7cdff3d
This code assumed only PUSHes would appear in call sequences. However, if calls require frame-pointer/base-pointer spills, only the PUSH operations inserted by spillFPBP will be recognized, and the adjustments to frame object offsets in prologepilog will be incorrect. This change correctly reports the SP adjustment for POP and ADD/SUB to rsp, and an assertion for unrecognized instructions that modify rsp.
55 lines
2.0 KiB
C++
55 lines
2.0 KiB
C++
//===-- X86MachineFunctionInfo.cpp - X86 machine function info ------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "X86MachineFunctionInfo.h"
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#include "X86RegisterInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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using namespace llvm;
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yaml::X86MachineFunctionInfo::X86MachineFunctionInfo(
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const llvm::X86MachineFunctionInfo &MFI)
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: AMXProgModel(MFI.getAMXProgModel()),
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FPClobberedByCall(MFI.getFPClobberedByCall()),
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HasPushSequences(MFI.getHasPushSequences()) {}
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void yaml::X86MachineFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
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MappingTraits<X86MachineFunctionInfo>::mapping(YamlIO, *this);
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}
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MachineFunctionInfo *X86MachineFunctionInfo::clone(
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BumpPtrAllocator &Allocator, MachineFunction &DestMF,
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const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
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const {
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return DestMF.cloneInfo<X86MachineFunctionInfo>(*this);
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}
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void X86MachineFunctionInfo::initializeBaseYamlFields(
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const yaml::X86MachineFunctionInfo &YamlMFI) {
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AMXProgModel = YamlMFI.AMXProgModel;
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FPClobberedByCall = YamlMFI.FPClobberedByCall;
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HasPushSequences = YamlMFI.HasPushSequences;
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}
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void X86MachineFunctionInfo::anchor() { }
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void X86MachineFunctionInfo::setRestoreBasePointer(const MachineFunction *MF) {
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if (!RestoreBasePointerOffset) {
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const X86RegisterInfo *RegInfo = static_cast<const X86RegisterInfo *>(
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MF->getSubtarget().getRegisterInfo());
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unsigned SlotSize = RegInfo->getSlotSize();
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for (const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs();
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unsigned Reg = *CSR; ++CSR) {
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if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
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RestoreBasePointerOffset -= SlotSize;
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}
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}
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}
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