6712e20c52
Added Support for flag output operand "=@cc", inline assembly constraint
for
SystemZ.
- Clang now accepts "=@cc" assembly operands, and sets 2-bits condition
code
for output operand for SyatemZ.
- Clang currently emits an assertion that flag output operands are
boolean
values, i.e. in the range [0, 2). Generalize this mechanism to allow
targets to specify arbitrary range assertions for any inline assembly
output operand. This will be used to assert that SystemZ two-bit
condition-code values are in the range [0, 4).
- SystemZ backend lowers "@cc" targets by using ipm sequence to extract
condition code from PSW.
- DAGCombine tries to optimize lowered ipm sequence by combining
CCReg and computing effective CCMask and CCValid in combineCCMask for
select_ccmask and br_ccmask.
- Cost computation is done for merging conditionals for branch
instruction
in SelectionDAG, as split may cause branches conditions evaluation goes
across basic block and difficult to combine.
---------
Co-authored-by: anoopkg6 <anoopkg6@github.com>
Co-authored-by: Ulrich Weigand <ulrich.weigand@de.ibm.com>
58 lines
2.6 KiB
C
58 lines
2.6 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
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// RUN: %clang_cc1 -O2 -triple s390x-linux -emit-llvm -o - %s | FileCheck %s
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// CHECK-LABEL: define dso_local signext range(i32 0, 4) i32 @test(
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// CHECK-SAME: i32 noundef signext [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i32 } asm "ahi $0,42\0A", "=d,={@cc},0"(i32 [[X]]) #[[ATTR2:[0-9]+]], !srcloc [[META2:![0-9]+]]
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// CHECK-NEXT: [[ASMRESULT1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
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// CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[ASMRESULT1]], 4
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// CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP1]])
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// CHECK-NEXT: ret i32 [[ASMRESULT1]]
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//
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int test(int x) {
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int cc;
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asm ("ahi %[x],42\n" : [x] "+d"(x), "=@cc" (cc));
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return cc;
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}
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// CHECK-LABEL: define dso_local signext range(i32 0, 2) i32 @test_low_high_transformation(
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// CHECK-SAME: i32 noundef signext [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i32 } asm "ahi $0,42\0A", "=d,={@cc},0"(i32 [[X]]) #[[ATTR2]], !srcloc [[META3:![0-9]+]]
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// CHECK-NEXT: [[ASMRESULT1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
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// CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[ASMRESULT1]], 4
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// CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP1]])
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// CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[ASMRESULT1]], -1
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// CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 2
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// CHECK-NEXT: [[LOR_EXT:%.*]] = zext i1 [[TMP3]] to i32
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// CHECK-NEXT: ret i32 [[LOR_EXT]]
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//
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int test_low_high_transformation(int x) {
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int cc;
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asm ("ahi %[x],42\n" : [x] "+d"(x), "=@cc" (cc));
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return cc == 1 || cc == 2;
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}
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// CHECK-LABEL: define dso_local signext range(i32 0, 2) i32 @test_equal_high_transformation(
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// CHECK-SAME: i32 noundef signext [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i32 } asm "ahi $0,42\0A", "=d,={@cc},0"(i32 [[X]]) #[[ATTR2]], !srcloc [[META4:![0-9]+]]
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// CHECK-NEXT: [[ASMRESULT1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
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// CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[ASMRESULT1]], 4
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// CHECK-NEXT: tail call void @llvm.assume(i1 [[TMP1]])
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// CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ASMRESULT1]], 1
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// CHECK-NEXT: [[LOR_EXT:%.*]] = xor i32 [[TMP2]], 1
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// CHECK-NEXT: ret i32 [[LOR_EXT]]
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//
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int test_equal_high_transformation(int x) {
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int cc;
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asm ("ahi %[x],42\n" : [x] "+d"(x), "=@cc" (cc));
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return cc == 0 || cc == 2;
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}
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//.
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// CHECK: [[META2]] = !{i64 788}
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// CHECK: [[META3]] = !{i64 1670}
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// CHECK: [[META4]] = !{i64 2505}
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//.
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