64b9896754
When using no-movt we don't use the pcrel version of the literal load.
This change also unifies logic with the ARM version of this function as
well,
which has:
```
if (!Subtarget.useMovt() || ForceELFGOTPIC) {
// For ELF non-PIC, use GOT PIC code sequence as well because R_ARM_GOT_ABS
// does not have assembler support.
if (TM.isPositionIndependent() || ForceELFGOTPIC)
expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_pcrel, ARM::LDRi12);
else
expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_abs, ARM::LDRi12);
return;
}
```
rdar://138334512
69 lines
2.0 KiB
LLVM
69 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -relocation-model=static -mattr=+no-movt < %s | FileCheck %s --check-prefix=STATIC
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; RUN: llc -relocation-model=pic -mattr=+no-movt < %s | FileCheck %s --check-prefix=PIC
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target triple = "thumbv7a-linux-gnueabi"
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define i32 @test1() #0 {
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; STATIC-LABEL: test1:
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; STATIC: @ %bb.0:
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; STATIC-NEXT: push {r7, lr}
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; STATIC-NEXT: sub.w sp, sp, #1032
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; STATIC-NEXT: ldr r0, .LCPI0_0
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; STATIC-NEXT: ldr r0, [r0]
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; STATIC-NEXT: str.w r0, [sp, #1028]
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; STATIC-NEXT: add r0, sp, #4
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; STATIC-NEXT: bl foo
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; STATIC-NEXT: ldr.w r0, [sp, #1028]
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; STATIC-NEXT: ldr r1, .LCPI0_0
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; STATIC-NEXT: ldr r1, [r1]
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; STATIC-NEXT: cmp r1, r0
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; STATIC-NEXT: ittt eq
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; STATIC-NEXT: moveq r0, #0
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; STATIC-NEXT: addeq.w sp, sp, #1032
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; STATIC-NEXT: popeq {r7, pc}
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; STATIC-NEXT: .LBB0_1:
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; STATIC-NEXT: bl __stack_chk_fail
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; STATIC-NEXT: .p2align 2
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; STATIC-NEXT: @ %bb.2:
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; STATIC-NEXT: .LCPI0_0:
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; STATIC-NEXT: .long __stack_chk_guard
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;
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; PIC-LABEL: test1:
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; PIC: @ %bb.0:
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; PIC-NEXT: push {r7, lr}
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; PIC-NEXT: sub.w sp, sp, #1032
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; PIC-NEXT: ldr r0, .LCPI0_0
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; PIC-NEXT: .LPC0_0:
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; PIC-NEXT: add r0, pc
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; PIC-NEXT: ldr r0, [r0]
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; PIC-NEXT: str.w r0, [sp, #1028]
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; PIC-NEXT: add r0, sp, #4
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; PIC-NEXT: bl foo
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; PIC-NEXT: ldr.w r0, [sp, #1028]
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; PIC-NEXT: ldr r1, .LCPI0_1
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; PIC-NEXT: .LPC0_1:
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; PIC-NEXT: add r1, pc
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; PIC-NEXT: ldr r1, [r1]
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; PIC-NEXT: cmp r1, r0
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; PIC-NEXT: ittt eq
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; PIC-NEXT: moveq r0, #0
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; PIC-NEXT: addeq.w sp, sp, #1032
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; PIC-NEXT: popeq {r7, pc}
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; PIC-NEXT: .LBB0_1:
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; PIC-NEXT: bl __stack_chk_fail
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; PIC-NEXT: .p2align 2
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; PIC-NEXT: @ %bb.2:
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; PIC-NEXT: .LCPI0_0:
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; PIC-NEXT: .long __stack_chk_guard-(.LPC0_0+4)
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; PIC-NEXT: .LCPI0_1:
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; PIC-NEXT: .long __stack_chk_guard-(.LPC0_1+4)
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%a1 = alloca [256 x i32], align 4
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call void @foo(ptr %a1) #3
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ret i32 0
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}
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declare void @foo(ptr)
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attributes #0 = { nounwind sspstrong }
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