16661b5d6c
fixes #156068 - We needed to add a new sub arch to the target tripple so we can test that emulation does not happen when targeting SM6.9 - The HLSL toolchain needed to be updated to handle the conversion of strings to enums for the new sub arch. - The emulation is done in DXILIntrinsicExpansion.cpp and needs to be able to convert both llvm.is.fpclass and lvm.dx.isinf to the proper emulation - test updates in TargetParser/TripleTest.cpp, isinf.ll, is_fpclass.ll, and DXCModeTest.cpp
70 lines
3.4 KiB
LLVM
70 lines
3.4 KiB
LLVM
; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.9-library %s | FileCheck %s --check-prefixes=CHECK,SM69CHECK
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; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.8-library %s | FileCheck %s --check-prefixes=CHECK,SMOLDCHECK
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; Make sure dxil operation function calls for isinf are generated for float and half.
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define noundef i1 @isinf_float(float noundef %a) {
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entry:
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; CHECK: call i1 @dx.op.isSpecialFloat.f32(i32 9, float %{{.*}}) #[[#ATTR:]]
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%dx.isinf = call i1 @llvm.dx.isinf.f32(float %a)
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ret i1 %dx.isinf
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}
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define noundef i1 @isinf_half(half noundef %a) {
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entry:
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; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half %{{.*}}) #[[#ATTR]]
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; SMOLDCHECK: [[BITCAST:%.*]] = bitcast half %a to i16
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; SMOLDCHECK: [[CMPHIGH:%.*]] = icmp eq i16 [[BITCAST]], 31744
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; SMOLDCHECK: [[CMPLOW:%.*]] = icmp eq i16 [[BITCAST]], -1024
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; SMOLDCHECK: [[OR:%.*]] = or i1 [[CMPHIGH]], [[CMPLOW]]
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%dx.isinf = call i1 @llvm.dx.isinf.f16(half %a)
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ret i1 %dx.isinf
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}
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define noundef <4 x i1> @isinf_half4(<4 x half> noundef %p0) {
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entry:
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; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
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; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
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; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
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; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
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; SMOLDCHECK: [[ee0:%.*]] = extractelement <4 x half> %p0, i64 0
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; SMOLDCHECK: [[BITCAST0:%.*]] = bitcast half [[ee0]] to i16
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; SMOLDCHECK: [[ee1:%.*]] = extractelement <4 x half> %p0, i64 1
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; SMOLDCHECK: [[BITCAST1:%.*]] = bitcast half [[ee1]] to i16
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; SMOLDCHECK:[[ee2:%.*]] = extractelement <4 x half> %p0, i64 2
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; SMOLDCHECK: [[BITCAST2:%.*]] = bitcast half [[ee2]] to i16
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; SMOLDCHECK: [[ee3:%.*]] = extractelement <4 x half> %p0, i64 3
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; SMOLDCHECK: [[BITCAST3:%.*]] = bitcast half [[ee3]] to i16
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; SMOLDCHECK: [[ICMPHIGH0:%.*]] = icmp eq i16 [[BITCAST0]], 31744
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; SMOLDCHECK: [[ICMPHIGH1:%.*]] = icmp eq i16 [[BITCAST1]], 31744
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; SMOLDCHECK: [[ICMPHIGH2:%.*]] = icmp eq i16 [[BITCAST2]], 31744
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; SMOLDCHECK: [[ICMPHIGH3:%.*]] = icmp eq i16 [[BITCAST3]], 31744
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; SMOLDCHECK: [[ICMPLOW0:%.*]] = icmp eq i16 [[BITCAST0]], -1024
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; SMOLDCHECK: [[ICMPLOW1:%.*]] = icmp eq i16 [[BITCAST1]], -1024
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; SMOLDCHECK: [[ICMPLOW2:%.*]] = icmp eq i16 [[BITCAST2]], -1024
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; SMOLDCHECK: [[ICMPLOW3:%.*]] = icmp eq i16 [[BITCAST3]], -1024
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; SMOLDCHECK: [[OR0:%.*]] = or i1 [[ICMPHIGH0]], [[ICMPLOW0]]
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; SMOLDCHECK: [[OR1:%.*]] = or i1 [[ICMPHIGH1]], [[ICMPLOW1]]
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; SMOLDCHECK: [[OR2:%.*]] = or i1 [[ICMPHIGH2]], [[ICMPLOW2]]
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; SMOLDCHECK: [[OR3:%.*]] = or i1 [[ICMPHIGH3]], [[ICMPLOW3]]
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; SMOLDCHECK: %.upto019 = insertelement <4 x i1> poison, i1 [[OR0]], i64 0
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; SMOLDCHECK: %.upto120 = insertelement <4 x i1> %.upto019, i1 [[OR1]], i64 1
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; SMOLDCHECK: %.upto221 = insertelement <4 x i1> %.upto120, i1 [[OR2]], i64 2
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; SMOLDCHECK: %0 = insertelement <4 x i1> %.upto221, i1 [[OR3]], i64 3
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%hlsl.isinf = call <4 x i1> @llvm.dx.isinf.v4f16(<4 x half> %p0)
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ret <4 x i1> %hlsl.isinf
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}
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define noundef <3 x i1> @isinf_float3(<3 x float> noundef %p0) {
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entry:
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; CHECK: call i1 @dx.op.isSpecialFloat.f32(i32 9, float
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; CHECK: call i1 @dx.op.isSpecialFloat.f32(i32 9, float
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; CHECK: call i1 @dx.op.isSpecialFloat.f32(i32 9, float
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%hlsl.isinf = call <3 x i1> @llvm.dx.isinf.v3f32(<3 x float> %p0)
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ret <3 x i1> %hlsl.isinf
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}
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; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}}
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