53005fd435
This PR implements the emitting of the post-link CFG information in PGO analysis map, as explained in the [RFC](https://discourse.llvm.org/t/rfc-extending-the-pgo-analysis-map-with-propeller-cfg-frequencies/88617). This is enabled by a flag `pgo-analysis-map-emit-bb-sections-cfg`. This PR bumps the SHT_LLVM_BB_ADDR_MAP version to 5. Also includes some refactoring changes related to storing the CFG in the Basic block sections profile reader.
91 lines
3.2 KiB
LLVM
91 lines
3.2 KiB
LLVM
; Check the basic block sections labels option
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; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,UNIQ
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; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=false -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,NOUNIQ
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; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -split-machine-functions | FileCheck %s --check-prefixes=CHECK,UNIQ
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define void @_Z3bazb(i1 zeroext, i1 zeroext) personality ptr @__gxx_personality_v0 {
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br i1 %0, label %3, label %8
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3:
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%4 = invoke i32 @_Z3barv()
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to label %8 unwind label %6
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br label %10
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6:
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landingpad { ptr, i32 }
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catch ptr null
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br label %12
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8:
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%9 = call i32 @_Z3foov()
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br i1 %1, label %12, label %10
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10:
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%11 = select i1 %1, ptr blockaddress(@_Z3bazb, %3), ptr blockaddress(@_Z3bazb, %12) ; <ptr> [#uses=1]
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indirectbr ptr %11, [label %3, label %12]
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12:
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ret void
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}
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declare i32 @_Z3barv() #1
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declare i32 @_Z3foov() #1
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declare i32 @__gxx_personality_v0(...)
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; UNIQ: .section .text._Z3bazb,"ax",@progbits{{$}}
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; NOUNIQ: .section .text,"ax",@progbits,unique,1
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; CHECK-LABEL: _Z3bazb:
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; CHECK-LABEL: .Lfunc_begin0:
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; CHECK-LABEL: .LBB_END0_0:
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; CHECK-LABEL: .LBB0_1:
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; CHECK-LABEL: .LBB0_1_CS0:
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; CHECK-LABEL: .LBB_END0_1:
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; CHECK-LABEL: .LBB0_2:
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; CHECK-LABEL: .LBB0_2_CS0:
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; CHECK-LABEL: .LBB_END0_2:
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; CHECK-LABEL: .LBB0_3:
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; CHECK-LABEL: .LBB_END0_3:
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; CHECK-LABEL: .Lfunc_end0:
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; UNIQ: .section .llvm_bb_addr_map,"o",@llvm_bb_addr_map,.text._Z3bazb{{$}}
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;; Verify that with -unique-section-names=false, the unique id of the text section gets assigned to the llvm_bb_addr_map section.
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; NOUNIQ: .section .llvm_bb_addr_map,"o",@llvm_bb_addr_map,.text,unique,1
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; CHECK-NEXT: .byte 5 # version
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; CHECK-NEXT: .short 32 # feature
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; CHECK-NEXT: .quad .Lfunc_begin0 # function address
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; CHECK-NEXT: .byte 6 # number of basic blocks
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; CHECK-NEXT: .byte 0 # BB id
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; CHECK-NEXT: .uleb128 .Lfunc_begin0-.Lfunc_begin0
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; CHECK-NEXT: .byte 0 # number of callsites
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; CHECK-NEXT: .uleb128 .LBB_END0_0-.Lfunc_begin0
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; CHECK-NEXT: .byte 8
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; CHECK-NEXT: .byte 1 # BB id
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; CHECK-NEXT: .uleb128 .LBB0_1-.LBB_END0_0
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; CHECK-NEXT: .byte 1 # number of callsites
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; CHECK-NEXT: .uleb128 .LBB0_1_CS0-.LBB0_1
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; CHECK-NEXT: .uleb128 .LBB_END0_1-.LBB0_1_CS0
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; CHECK-NEXT: .byte 8
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; CHECK-NEXT: .byte 3 # BB id
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; CHECK-NEXT: .uleb128 .LBB0_2-.LBB_END0_1
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; CHECK-NEXT: .byte 1 # number of callsites
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; CHECK-NEXT: .uleb128 .LBB0_2_CS0-.LBB0_2
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; CHECK-NEXT: .uleb128 .LBB_END0_2-.LBB0_2_CS0
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; CHECK-NEXT: .byte 8
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; CHECK-NEXT: .byte 4 # BB id
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; CHECK-NEXT: .uleb128 .LBB0_3-.LBB_END0_2
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; CHECK-NEXT: .byte 0 # number of callsites
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; CHECK-NEXT: .uleb128 .LBB_END0_3-.LBB0_3
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; CHECK-NEXT: .byte 16
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; CHECK-NEXT: .byte 5 # BB id
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; CHECK-NEXT: .uleb128 .LBB0_4-.LBB_END0_3
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; CHECK-NEXT: .byte 0 # number of callsites
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; CHECK-NEXT: .uleb128 .LBB_END0_4-.LBB0_4
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 2 # BB id
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; CHECK-NEXT: .uleb128 .LBB0_5-.LBB_END0_4
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; CHECK-NEXT: .byte 0 # number of callsites
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; CHECK-NEXT: .uleb128 .LBB_END0_5-.LBB0_5
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; CHECK-NEXT: .byte 5
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