If the commutable instruction can be represented as a non-commutable vector instruction (like add 0, %v can be represented as a part of sub nodes with operation sub %v, 0), its operands might still be reordered and this should be accounted when checking for copyables in operands Fixes #158293
25 lines
1.4 KiB
LLVM
25 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt --passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f < %s | FileCheck %s
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define i64 @test(i32 %arg) {
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; CHECK-LABEL: define i64 @test(
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; CHECK-SAME: i32 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[BB:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr addrspace(1) getelementptr inbounds nuw (i8, ptr addrspace(1) null, i64 896), align 4
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; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[TMP0]], zeroinitializer
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> <i32 poison, i32 0>, i32 [[ARG]], i32 0
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; CHECK-NEXT: [[TMP3:%.*]] = sub <2 x i32> [[TMP1]], [[TMP2]]
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; CHECK-NEXT: store <2 x i32> [[TMP3]], ptr addrspace(1) getelementptr inbounds nuw (i8, ptr addrspace(1) null, i64 896), align 4
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; CHECK-NEXT: ret i64 0
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;
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bb:
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%load = load i32, ptr addrspace(1) getelementptr inbounds nuw (i8, ptr addrspace(1) null, i64 900), align 4
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%add = add i32 0, %load
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store i32 %add, ptr addrspace(1) getelementptr inbounds nuw (i8, ptr addrspace(1) null, i64 900), align 4
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%load1 = load i32, ptr addrspace(1) getelementptr inbounds nuw (i8, ptr addrspace(1) null, i64 896), align 4
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%add2 = add i32 %load1, 0
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%sub = sub i32 %add2, %arg
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store i32 %sub, ptr addrspace(1) getelementptr inbounds nuw (i8, ptr addrspace(1) null, i64 896), align 4
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ret i64 0
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}
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