This PR implements the emitting of the post-link CFG information in PGO analysis map, as explained in the [RFC](https://discourse.llvm.org/t/rfc-extending-the-pgo-analysis-map-with-propeller-cfg-frequencies/88617). This is enabled by a flag `pgo-analysis-map-emit-bb-sections-cfg`. This PR bumps the SHT_LLVM_BB_ADDR_MAP version to 5. Also includes some refactoring changes related to storing the CFG in the Basic block sections profile reader.
42 lines
1.6 KiB
LLVM
42 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-address-map | FileCheck %s
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$_Z4fooTIiET_v = comdat any
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define dso_local i32 @_Z3barv() {
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ret i32 0
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}
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;; Check we add SHF_LINK_ORDER for .llvm_bb_addr_map and link it with the corresponding .text sections.
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; CHECK: .section .text._Z3barv,"ax",@progbits
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; CHECK-LABEL: _Z3barv:
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; CHECK-NEXT: [[BAR_BEGIN:.Lfunc_begin[0-9]+]]:
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; CHECK: .section .llvm_bb_addr_map,"o",@llvm_bb_addr_map,.text._Z3barv{{$}}
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; CHECK-NEXT: .byte 5 # version
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; CHECK-NEXT: .short 0 # feature
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; CHECK-NEXT: .quad [[BAR_BEGIN]] # function address
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define dso_local i32 @_Z3foov() {
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%1 = call i32 @_Z4fooTIiET_v()
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ret i32 %1
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}
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; CHECK: .section .text._Z3foov,"ax",@progbits
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; CHECK-LABEL: _Z3foov:
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; CHECK-NEXT: [[FOO_BEGIN:.Lfunc_begin[0-9]+]]:
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; CHECK: .section .llvm_bb_addr_map,"o",@llvm_bb_addr_map,.text._Z3foov{{$}}
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; CHECK-NEXT: .byte 5 # version
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; CHECK-NEXT: .short 32 # feature
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; CHECK-NEXT: .quad [[FOO_BEGIN]] # function address
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define linkonce_odr dso_local i32 @_Z4fooTIiET_v() comdat {
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ret i32 0
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}
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;; Check we add .llvm_bb_addr_map section to a COMDAT group with the corresponding .text section if such a COMDAT exists.
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; CHECK: .section .text._Z4fooTIiET_v,"axG",@progbits,_Z4fooTIiET_v,comdat
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; CHECK-LABEL: _Z4fooTIiET_v:
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; CHECK-NEXT: [[FOOCOMDAT_BEGIN:.Lfunc_begin[0-9]+]]:
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; CHECK: .section .llvm_bb_addr_map,"oG",@llvm_bb_addr_map,.text._Z4fooTIiET_v,_Z4fooTIiET_v,comdat{{$}}
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; CHECK-NEXT: .byte 5 # version
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; CHECK-NEXT: .short 0 # feature
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; CHECK-NEXT: .quad [[FOOCOMDAT_BEGIN]] # function address
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