37eda40dd2
These tests verify SPIR-V code generation for LLVM intrinsics and atomic operations, ensuring correct translation of fcmp false, llvm.fake.use, and atomic_compare_exchange. --------- Co-authored-by: Michal Paszkowski <michal@michalpaszkowski.com>
85 lines
3.9 KiB
LLVM
85 lines
3.9 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64v1.2-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-NOT: OpCapability Int64Atomics
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; CHECK-DAG: %[[#int:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#int8:]] = OpTypeInt 8 0
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; CHECK-DAG: %[[#DeviceScope:]] = OpConstant %[[#int]] 1
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; CHECK-DAG: %[[#SequentiallyConsistent_MS:]] = OpConstant %[[#int]] 16
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; CHECK-DAG: %[[#int_ptr:]] = OpTypePointer Generic %[[#int]]
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; CHECK-DAG: %[[#int_ptr8:]] = OpTypePointer Generic %[[#int8]]
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; CHECK-DAG: %[[#bool:]] = OpTypeBool
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define spir_func void @test(ptr addrspace(4) %object, ptr addrspace(4) %expected, i32 %desired) {
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; CHECK: %[[#object:]] = OpFunctionParameter %[[#int_ptr8]]
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; CHECK: %[[#expected:]] = OpFunctionParameter %[[#int_ptr8]]
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; CHECK: %[[#desired:]] = OpFunctionParameter %[[#int]]
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entry:
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%object.addr = alloca ptr addrspace(4), align 4
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%expected.addr = alloca ptr addrspace(4), align 4
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%desired.addr = alloca i32, align 4
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%strong_res = alloca i8, align 1
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%res = alloca i8, align 1
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%weak_res = alloca i8, align 1
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store ptr addrspace(4) %object, ptr %object.addr, align 4
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store ptr addrspace(4) %expected, ptr %expected.addr, align 4
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store i32 %desired, ptr %desired.addr, align 4
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%0 = load ptr addrspace(4), ptr %object.addr, align 4
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%1 = load ptr addrspace(4), ptr %expected.addr, align 4
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%2 = load i32, ptr %desired.addr, align 4
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; CHECK-DAG: OpStore %[[#object_addr:]] %[[#object]]
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; CHECK-DAG: OpStore %[[#expected_addr:]] %[[#expected]]
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; CHECK-DAG: OpStore %[[#desired_addr:]] %[[#desired]]
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; CHECK: %[[#Pointer:]] = OpLoad %[[#int_ptr]] %[[#]]
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; CHECK: %[[#exp:]] = OpLoad %[[#int_ptr]] %[[#]]
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; CHECK: %[[#Value:]] = OpLoad %[[#int]] %[[#desired_addr]]
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; CHECK: %[[#Comparator:]] = OpLoad %[[#int]] %[[#exp]]
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; CHECK: %[[#Result:]] = OpAtomicCompareExchange %[[#int]] %[[#]] %[[#DeviceScope]] %[[#SequentiallyConsistent_MS]] %[[#SequentiallyConsistent_MS]] %[[#Value]] %[[#Comparator]]
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%call = call spir_func zeroext i1 @_Z30atomic_compare_exchange_strongPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4) %0, ptr addrspace(4) %1, i32 %2)
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; CHECK-NEXT: OpStore %[[#exp]] %[[#Result]]
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; CHECK-NEXT: %[[#CallRes:]] = OpIEqual %[[#bool]] %[[#Result]] %[[#Comparator]]
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; CHECK-NOT: %[[#Result]]
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%frombool = zext i1 %call to i8
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store i8 %frombool, ptr %strong_res, align 1
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%3 = load i8, ptr %strong_res, align 1
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%tobool = trunc i8 %3 to i1
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%lnot = xor i1 %tobool, true
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%frombool1 = zext i1 %lnot to i8
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store i8 %frombool1, ptr %res, align 1
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%4 = load ptr addrspace(4), ptr %object.addr, align 4
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%5 = load ptr addrspace(4), ptr %expected.addr, align 4
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%6 = load i32, ptr %desired.addr, align 4
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; CHECK: %[[#Pointer:]] = OpLoad %[[#int_ptr]] %[[#]]
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; CHECK: %[[#exp:]] = OpLoad %[[#int_ptr]] %[[#]]
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; CHECK: %[[#Value:]] = OpLoad %[[#int]] %[[#desired_addr]]
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; CHECK: %[[#ComparatorWeak:]] = OpLoad %[[#int]] %[[#exp]]
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; CHECK: %[[#Result:]] = OpAtomicCompareExchangeWeak %[[#int]] %[[#]] %[[#DeviceScope]] %[[#SequentiallyConsistent_MS]] %[[#SequentiallyConsistent_MS]] %[[#Value]] %[[#ComparatorWeak]]
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%call2 = call spir_func zeroext i1 @_Z28atomic_compare_exchange_weakPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4) %4, ptr addrspace(4) %5, i32 %6)
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; CHECK-NEXT: OpStore %[[#exp]] %[[#Result]]
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; CHECK-NEXT: %[[#CallRes:]] = OpIEqual %[[#bool]] %[[#Result]] %[[#ComparatorWeak]]
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; CHECK-NOT: %[[#Result]]
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%frombool3 = zext i1 %call2 to i8
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store i8 %frombool3, ptr %weak_res, align 1
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%7 = load i8, ptr %weak_res, align 1
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%tobool4 = trunc i8 %7 to i1
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%lnot5 = xor i1 %tobool4, true
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%frombool6 = zext i1 %lnot5 to i8
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store i8 %frombool6, ptr %res, align 1
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ret void
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}
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declare spir_func zeroext i1 @_Z30atomic_compare_exchange_strongPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4), ptr addrspace(4), i32) #1
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declare spir_func zeroext i1 @_Z28atomic_compare_exchange_weakPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4), ptr addrspace(4), i32) #1
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