80267f8148
The recently announced IBM z17 processor implements the architecture already supported as "arch15" in LLVM. This patch adds support for "z17" as an alternate architecture name for arch15. This patch also add the scheduler description for the z17 processor, provided by Jonas Paulsson.
230 lines
7.0 KiB
LLVM
230 lines
7.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
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; Test high-part i64->i128 multiplications on z17.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s
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; Check zero-extended multiplication in which only the high part is used.
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define i64 @f1(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlgr %r2, %r4
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check sign-extended multiplication in which only the high part is used.
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define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mgrk %r2, %r3, %r4
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%ax = sext i64 %a to i128
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%bx = sext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check zero-extended multiplication in which only part of the high half
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; is used. FIXME: Should use MLGR as well.
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define i64 @f3(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vgbm %v1, 0
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; CHECK-NEXT: vlvgg %v1, %r3, 1
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; CHECK-NEXT: vlvgg %v0, %r4, 1
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; CHECK-NEXT: vmlq %v0, %v1, %v0
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; CHECK-NEXT: vrepib %v1, 67
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; CHECK-NEXT: vsrlb %v0, %v0, %v1
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; CHECK-NEXT: vsrl %v0, %v0, %v1
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; CHECK-NEXT: vlgvg %r2, %v0, 1
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; CHECK-NEXT: br %r14
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 67
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check zero-extended multiplication in which the result is split into
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; high and low halves. FIXME: Should use MLGR as well.
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define i64 @f4(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vgbm %v1, 0
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; CHECK-NEXT: vlvgg %v1, %r3, 1
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; CHECK-NEXT: vlvgg %v0, %r4, 1
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; CHECK-NEXT: vmlq %v0, %v1, %v0
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; CHECK-NEXT: vrepib %v1, 64
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; CHECK-NEXT: vsrlb %v1, %v0, %v1
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; CHECK-NEXT: vo %v0, %v1, %v0
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; CHECK-NEXT: vlgvg %r2, %v0, 1
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; CHECK-NEXT: br %r14
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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%low = trunc i128 %mulx to i64
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%or = or i64 %high, %low
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ret i64 %or
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}
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; Check division by a constant, which should use multiplication instead.
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define i64 @f5(i64 %dummy, i64 %a) {
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; CHECK-LABEL: f5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: llihf %r0, 1782028570
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; CHECK-NEXT: oilf %r0, 598650223
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlgr %r2, %r0
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; CHECK-NEXT: srlg %r2, %r2, 9
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; CHECK-NEXT: br %r14
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%res = udiv i64 %a, 1234
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ret i64 %res
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}
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; Check MLG with no displacement.
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define i64 @f6(i64 %dummy, i64 %a, ptr %src) {
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; CHECK-LABEL: f6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlg %r2, 0(%r4)
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%b = load i64, ptr %src
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the high end of the aligned MLG range.
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define i64 @f7(i64 %dummy, i64 %a, ptr %src) {
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; CHECK-LABEL: f7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlg %r2, 524280(%r4)
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%ptr = getelementptr i64, ptr %src, i64 65535
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%b = load i64, ptr %ptr
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the next doubleword up, which requires separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f8(i64 %dummy, i64 %a, ptr %src) {
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; CHECK-LABEL: f8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: agfi %r4, 524288
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlg %r2, 0(%r4)
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%ptr = getelementptr i64, ptr %src, i64 65536
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%b = load i64, ptr %ptr
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the high end of the negative aligned MLG range.
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define i64 @f9(i64 %dummy, i64 %a, ptr %src) {
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; CHECK-LABEL: f9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlg %r2, -8(%r4)
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%ptr = getelementptr i64, ptr %src, i64 -1
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%b = load i64, ptr %ptr
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the low end of the MLG range.
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define i64 @f10(i64 %dummy, i64 %a, ptr %src) {
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; CHECK-LABEL: f10:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlg %r2, -524288(%r4)
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%ptr = getelementptr i64, ptr %src, i64 -65536
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%b = load i64, ptr %ptr
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f11(ptr %dest, i64 %a, ptr %src) {
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; CHECK-LABEL: f11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: agfi %r4, -524296
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlg %r2, 0(%r4)
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%ptr = getelementptr i64, ptr %src, i64 -65537
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%b = load i64, ptr %ptr
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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; Check that MLG allows an index.
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define i64 @f12(ptr %dest, i64 %a, i64 %src, i64 %index) {
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; CHECK-LABEL: f12:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3d killed $r3d def $r2q
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; CHECK-NEXT: mlg %r2, 524287(%r5,%r4)
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; CHECK-NEXT: # kill: def $r2d killed $r2d killed $r2q
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; CHECK-NEXT: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to ptr
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%b = load i64, ptr %ptr
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%ax = zext i64 %a to i128
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%bx = zext i64 %b to i128
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%mulx = mul i128 %ax, %bx
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%highx = lshr i128 %mulx, 64
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%high = trunc i128 %highx to i64
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ret i64 %high
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}
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