Matt Arsenault 0c9919d7ea AMDGPU: Move test to correct place ...

Fixes test location from b595849e7c50a37ae96ca939ff29cb82c2281789

2026-01-12 20:53:28 +01:00

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addrspacecast.ll

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amdgcn-demanded-vector-elts-inseltpoison.ll

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amdgcn-demanded-vector-elts.ll

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amdgcn-intrinsics-gfx8.ll

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amdgcn-intrinsics.ll

[AMDGPU] Add the support for 45-bit buffer resource (#159702)

2025-09-24 11:12:02 -04:00

amdgcn-simplify-image-buffer-stores.ll

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bitcast-fold-lane-ops.ll

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fma_legacy.ll

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fmed3-fpext-fold.ll

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fmed3.ll

[InstSimplify] Optimize maximumnum and minimumnum (#139581)

2025-10-07 14:23:32 +01:00

fmul_legacy.ll

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image-d16.ll

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issue68120.ll

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lane-index-simplify-demanded-bits.ll

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lit.local.cfg

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llvm.amdgcn.readfirstlane.ll

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llvm.amdgcn.readlane.ll

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llvm.amdgcn.wavefrontsize.ll

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mbcnt-negative-cases.ll

AMDGPU: Move test to correct place

2026-01-12 20:53:28 +01:00

mbcnt-wave32-optimizations.ll

AMDGPU: Move test to correct place

2026-01-12 20:53:28 +01:00

mbcnt-wave64-optimizations.ll

AMDGPU: Move test to correct place

2026-01-12 20:53:28 +01:00

mbcnt.ll

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memcpy-from-constant.ll

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mfma-scale.ll

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permlane64.ll

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phi-with-incoming-from-load.ll

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ptr-replace-alloca.ll

InstCombine: Check GEP operand is available (#160438)

2025-09-25 17:20:20 +09:00

rcp-contract-rsq.ll

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select-from-load.ll

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simplify-amdgcn.cvt.off.f32.i4.ll

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simplify-demanded-vector-elts-lane-intrinsics.ll

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tan.ll

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tensor-load-store-lds.ll

[AMDGPU] tensor_{load_to/store_from}_lds => ..._d2 simplification (#171540)

2025-12-15 08:11:03 -08:00

trivially-uniform.ll

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wmma-f8f6f4.ll

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