573ca36753
The `masked.load`, `masked.store`, `masked.gather` and `masked.scatter` intrinsics currently accept a separate alignment immarg. Replace this with an `align` attribute on the pointer / vector of pointers argument. This is the standard representation for alignment information on intrinsics, and is already used by all other memory intrinsics. This means the signatures now match llvm.expandload, llvm.vp.load, etc. (Things like llvm.memcpy used to have a separate alignment argument as well, but were already migrated a long time ago.) It's worth noting that the masked.gather and masked.scatter intrinsics previously accepted a zero alignment to indicate the ABI type alignment of the element type. This special case is gone now: If the align attribute is omitted, the implied alignment is 1, as usual. If ABI alignment is desired, it needs to be explicitly emitted (which the IRBuilder API already requires anyway).
49 lines
2.5 KiB
LLVM
49 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux -pass-remarks-output=%t -mattr=+v -slp-threshold=-10 < %s | FileCheck %s
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; RUN: FileCheck %s --check-prefix=YAML < %t
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; YAML-LABEL: --- !Passed
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; YAML-NEXT: Pass: slp-vectorizer
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; YAML-NEXT: Name: StoresVectorized
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; YAML-NEXT: Function: test
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; YAML-NEXT: Args:
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; YAML-NEXT: - String: 'Stores SLP vectorized with cost '
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; YAML-NEXT: - Cost: '-2'
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; YAML-NEXT: - String: ' and with tree size '
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; YAML-NEXT: - TreeSize: '9'
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define void @test() {
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; CHECK-LABEL: define void @test(
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; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr null, align 4
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; CHECK-NEXT: [[TMP5:%.*]] = call <2 x float> @llvm.masked.gather.v2f32.v2p0(<2 x ptr> align 4 zeroinitializer, <2 x i1> splat (i1 true), <2 x float> poison)
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x float> <float poison, float 0.000000e+00>, float [[TMP2]], i32 0
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; CHECK-NEXT: [[TMP6:%.*]] = fcmp ogt <2 x float> [[TMP3]], [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x i1> [[TMP6]], <2 x i1> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
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; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> <float poison, float poison, float poison, float 0.000000e+00>, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
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; CHECK-NEXT: [[TMP10:%.*]] = select <4 x i1> [[TMP7]], <4 x float> [[TMP9]], <4 x float> zeroinitializer
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; CHECK-NEXT: store <4 x float> [[TMP10]], ptr null, align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%0 = load float, ptr null, align 4
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%1 = load float, ptr null, align 4
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%2 = load float, ptr null, align 4
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%cmp.i = fcmp ogt float %1, %0
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%v14.0 = select i1 %cmp.i, float %1, float 0.000000e+00
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%v0.0 = select i1 %cmp.i, float %0, float 0.000000e+00
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%cmp4.i = fcmp ogt float 0.000000e+00, %2
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%v19.0 = select i1 %cmp4.i, float 0.000000e+00, float 0.000000e+00
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%v9.0 = select i1 %cmp4.i, float %2, float 0.000000e+00
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store float %v0.0, ptr null, align 4
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%v9idx = getelementptr i8, ptr null, i32 4
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store float %v9.0, ptr %v9idx, align 4
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%v14idx = getelementptr i8, ptr null, i32 8
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store float %v14.0, ptr %v14idx, align 4
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%v19idx = getelementptr i8, ptr null, i32 12
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store float %v19.0, ptr %v19idx, align 4
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ret void
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}
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