fa9cef50b1
This PR is motivated by a mismatch we discovered between compilation results with vs. without `-g3`. We noticed this when compiling SPEC2017 testcases. The specific instance we saw is fixed in this PR by modifying a guard (see below), but it is likely similar instances exist elsewhere in the codebase. The specific case fixed in this PR manifests itself in the `SimplifyCFG` pass doing different things depending on whether DebugInfo is generated or not. At the end of this comment, there is reduced example code that shows the behavior in question. The differing behavior has two root causes: 1. Commit https://github.com/llvm/llvm-project/commit/c07e19b adds loop metadata including debug locations to loops that otherwise would not have loop metadata 2. Commit https://github.com/llvm/llvm-project/commit/ac28efa6c100 adds a guard to a simplification action in `SImplifyCFG` that prevents it from simplifying away loop metadata So, the change in 2. does not consider that when compiling with debug symbols, loops that otherwise would not have metadata that needs preserving, now have debug locations in their loop metadata. Thus, with `-g3`, `SimplifyCFG` behaves differently than without it. The larger issue is that while debug info is not supposed to influence the final compilation result, commits like 1. blur the line between what is and is not debug info, and not all optimization passes account for this. This PR does not address that and rather just modifies this particular guard in order to restore equivalent behavior between debug and non-debug builds in this one instance. --- Here is a reduced version of a file from `f526.blender_r` that showcases the behavior in question: ```C struct LinkNode; typedef struct LinkNode { struct LinkNode *next; void *link; } LinkNode; void do_projectpaint_thread_ph_v_state() { int *ps = do_projectpaint_thread_ph_v_state; LinkNode *node; while (do_projectpaint_thread_ph_v_state) for (node = ps; node; node = node->next) ; } ``` Compiling this with and without DebugInfo, and then disassembling the results, leads to different outcomes (tested on SystemZ and X86). The reason for this is that the `SimplifyCFG` pass does different things in either case.
170 lines
6.5 KiB
LLVM
170 lines
6.5 KiB
LLVM
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -keep-loops=false -S < %s | FileCheck %s
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; RUN: opt -passes='simplifycfg<no-keep-loops>' -S < %s | FileCheck %s
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define void @test1(i32 %n) #0 {
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entry:
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%n.addr = alloca i32, align 4
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%count = alloca i32, align 4
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store i32 %n, ptr %n.addr, align 4
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store i32 0, ptr %count, align 4
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br label %while.cond
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while.cond: ; preds = %if.end, %entry
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%0 = load i32, ptr %count, align 4
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%1 = load i32, ptr %n.addr, align 4
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%cmp = icmp ule i32 %0, %1
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br i1 %cmp, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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%2 = load i32, ptr %count, align 4
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%rem = urem i32 %2, 2
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%cmp1 = icmp eq i32 %rem, 0
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br i1 %cmp1, label %if.then, label %if.else
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if.then: ; preds = %while.body
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%3 = load i32, ptr %count, align 4
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%add = add i32 %3, 1
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store i32 %add, ptr %count, align 4
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br label %if.end
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; CHECK: if.then:
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; CHECK: br label %while.cond, !llvm.loop !1
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if.else: ; preds = %while.body
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%4 = load i32, ptr %count, align 4
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%add2 = add i32 %4, 2
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store i32 %add2, ptr %count, align 4
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br label %if.end
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; CHECK: if.else:
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; CHECK: br label %while.cond, !llvm.loop !1
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if.end: ; preds = %if.else, %if.then
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br label %while.cond, !llvm.loop !1
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while.end: ; preds = %while.cond
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ret void
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}
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; Test that empty loop latch `while.cond.loopexit` will not be folded into its successor if its
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; predecessor blocks are also loop latches.
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;
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; The test case is constructed based on the following C++ code.
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; While the C++ code itself might have the inner-loop unrolled (e.g., with -O3),
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; the loss of inner-loop unroll metadata is a bug.
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; Under some optimization pipelines (e.g., FullLoopUnroll pass is skipped in ThinLTO prelink stage),
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; and in real-world C++ code (e.g., with larger loop body), failing to
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; preserve loop unroll metadata could cause missed loop unroll.
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;
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; constexpr int kUnroll = 5;
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; int sum(int a, int b, int step, const int remainder, int* input) {
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; int i = a, j = b;
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; int sum = 0;
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; while(j - i > remainder) {
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; i += step;
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; #pragma unroll
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; for (int k = 0; k < kUnroll; k++) {
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; asm volatile ("add %w0, %w1\n" : "=r"(sum) : "r"(input[k + i]):"cc");
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; }
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; }
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; return sum;
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; }
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define i32 @test2(i32 %a, i32 %b, i32 %step, i32 %remainder, ptr %input) {
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entry:
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br label %while.cond
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while.cond.loopexit: ; preds = %for.body
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br label %while.cond, !llvm.loop !3
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while.cond: ; preds = %while.cond.loopexit, %entry
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%i.0 = phi i32 [ %a, %entry ], [ %add, %while.cond.loopexit ]
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%sum.0 = phi i32 [ 0, %entry ], [ %1, %while.cond.loopexit ]
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%sub = sub nsw i32 %b, %i.0
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%cmp = icmp sgt i32 %sub, %remainder
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br i1 %cmp, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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%add = add nsw i32 %i.0, %step
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br label %for.body
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for.body: ; preds = %while.body, %for.body
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%k.07 = phi i32 [ 0, %while.body ], [ %inc, %for.body ]
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%add2 = add nsw i32 %k.07, %add
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%idxprom = sext i32 %add2 to i64
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%arrayidx = getelementptr inbounds i32, ptr %input, i64 %idxprom
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%0 = load i32, ptr %arrayidx, align 4
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%1 = tail call i32 asm sideeffect "add ${0:w}, ${1:w}\0A", "=r,r,~{cc}"(i32 %0)
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%inc = add nuw nsw i32 %k.07, 1
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%cmp1 = icmp ult i32 %inc, 5
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br i1 %cmp1, label %for.body, label %while.cond.loopexit, !llvm.loop !5
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while.end: ; preds = %while.cond
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%sum.0.lcssa = phi i32 [ %sum.0, %while.cond ]
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ret i32 %sum.0.lcssa
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}
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; Test that the condition tested above does not trigger when the loop metadata consists only of debug locations,
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; i.e.the empty loop latch `while.cond.loopexit` *will* be folded into its successor if its
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; predecessor blocks are also loop latches and any loop metadata attached to it consists of debug information.
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;
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define i32 @test3(i32 %a, i32 %b, i32 %step, i32 %remainder, ptr %input) !dbg !7 {
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entry:
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br label %while.cond
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;CHECK-LABEL: @test3(
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;CHECK-NOT: while.cond.loopexit
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while.cond.loopexit: ; preds = %for.body
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br label %while.cond, !llvm.loop !10
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while.cond: ; preds = %while.cond.loopexit, %entry
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%i.0 = phi i32 [ %a, %entry ], [ %add, %while.cond.loopexit ]
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%sum.0 = phi i32 [ 0, %entry ], [ %1, %while.cond.loopexit ]
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%sub = sub nsw i32 %b, %i.0
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%cmp = icmp sgt i32 %sub, %remainder
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br i1 %cmp, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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%add = add nsw i32 %i.0, %step
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br label %for.body
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for.body: ; preds = %while.body, %for.body
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%k.07 = phi i32 [ 0, %while.body ], [ %inc, %for.body ]
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%add2 = add nsw i32 %k.07, %add
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%idxprom = sext i32 %add2 to i64
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%arrayidx = getelementptr inbounds i32, ptr %input, i64 %idxprom
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%0 = load i32, ptr %arrayidx, align 4
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%1 = tail call i32 asm sideeffect "add ${0:w}, ${1:w}\0A", "=r,r,~{cc}"(i32 %0)
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%inc = add nuw nsw i32 %k.07, 1
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%cmp1 = icmp ult i32 %inc, 5
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br i1 %cmp1, label %for.body, label %while.cond.loopexit, !llvm.loop !5
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while.end: ; preds = %while.cond
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%sum.0.lcssa = phi i32 [ %sum.0, %while.cond ]
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ret i32 %sum.0.lcssa
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}
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!llvm.module.flags = !{!0}
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!0 = !{i32 2, !"Debug Info Version", i32 3}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.distribute.enable", i1 true}
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!3 = distinct !{!3, !4}
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!4 = !{!"llvm.loop.mustprogress"}
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!5 = distinct !{!5, !4, !6}
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!6 = !{!"llvm.loop.unroll.enable"}
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!7 = distinct !DISubprogram(name: "test3", scope: !8, file: !8, spFlags: DISPFlagDefinition, unit: !9)
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!8 = !DIFile(filename: "preserve-llvm-loop-metadata.ll", directory: "/")
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!9 = distinct !DICompileUnit(language: DW_LANG_C99, file: !8, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
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!10 = distinct !{!10, !11, !13}
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!11 = !DILocation(line: 8, column: 4, scope: !12)
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!12 = distinct !DILexicalBlock(scope: !7, file: !8, line: 8, column: 2)
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!13 = !DILocation(line: 9, column: 23, scope: !12)
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; CHECK: !1 = distinct !{!1, !2}
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; CHECK: !2 = !{!"llvm.loop.distribute.enable", i1 true}
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; CHECK: !3 = distinct !{!3, !4}
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; CHECK: !4 = !{!"llvm.loop.mustprogress"}
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; CHECK: !5 = distinct !{!5, !4, !6}
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; CHECK: !6 = !{!"llvm.loop.unroll.enable"}
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; CHECK-NOT: !10 = distinct !{!10, !11, !13}
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