7dcb9c0f09
This was looking for full copies produced by SplitKit, but SplitKit introduces copy bundles if not all lanes are live. The scan for uses needs to look at bundles, not individual instructions. This is a prerequisite to avoiding some redundant spills due to subregisters which will help avoid an allocation failure in a future patch.
297 lines
10 KiB
C++
297 lines
10 KiB
C++
//===- llvm/CodeGen/MachineInstrBundle.h - MI bundle utilities --*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provide utility functions to manipulate machine instruction
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// bundles.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEINSTRBUNDLE_H
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#define LLVM_CODEGEN_MACHINEINSTRBUNDLE_H
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#include "llvm/CodeGen/MachineBasicBlock.h"
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namespace llvm {
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/// finalizeBundle - Finalize a machine instruction bundle which includes
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/// a sequence of instructions starting from FirstMI to LastMI (exclusive).
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/// This routine adds a BUNDLE instruction to represent the bundle, it adds
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/// IsInternalRead markers to MachineOperands which are defined inside the
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/// bundle, and it copies externally visible defs and uses to the BUNDLE
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/// instruction.
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void finalizeBundle(MachineBasicBlock &MBB,
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MachineBasicBlock::instr_iterator FirstMI,
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MachineBasicBlock::instr_iterator LastMI);
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/// finalizeBundle - Same functionality as the previous finalizeBundle except
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/// the last instruction in the bundle is not provided as an input. This is
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/// used in cases where bundles are pre-determined by marking instructions
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/// with 'InsideBundle' marker. It returns the MBB instruction iterator that
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/// points to the end of the bundle.
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MachineBasicBlock::instr_iterator finalizeBundle(MachineBasicBlock &MBB,
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MachineBasicBlock::instr_iterator FirstMI);
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/// finalizeBundles - Finalize instruction bundles in the specified
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/// MachineFunction. Return true if any bundles are finalized.
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bool finalizeBundles(MachineFunction &MF);
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/// Returns an iterator to the first instruction in the bundle containing \p I.
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inline MachineBasicBlock::instr_iterator getBundleStart(
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MachineBasicBlock::instr_iterator I) {
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while (I->isBundledWithPred())
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--I;
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return I;
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}
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/// Returns an iterator to the first instruction in the bundle containing \p I.
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inline MachineBasicBlock::const_instr_iterator getBundleStart(
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MachineBasicBlock::const_instr_iterator I) {
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while (I->isBundledWithPred())
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--I;
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return I;
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}
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/// Returns an iterator pointing beyond the bundle containing \p I.
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inline MachineBasicBlock::instr_iterator getBundleEnd(
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MachineBasicBlock::instr_iterator I) {
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while (I->isBundledWithSucc())
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++I;
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++I;
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return I;
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}
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/// Returns an iterator pointing beyond the bundle containing \p I.
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inline MachineBasicBlock::const_instr_iterator getBundleEnd(
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MachineBasicBlock::const_instr_iterator I) {
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while (I->isBundledWithSucc())
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++I;
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++I;
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return I;
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}
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//===----------------------------------------------------------------------===//
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// MachineBundleOperand iterator
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//
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/// MIBundleOperandIteratorBase - Iterator that visits all operands in a bundle
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/// of MachineInstrs. This class is not intended to be used directly, use one
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/// of the sub-classes instead.
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///
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/// Intended use:
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///
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/// for (MIBundleOperands MIO(MI); MIO.isValid(); ++MIO) {
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/// if (!MIO->isReg())
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/// continue;
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/// ...
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/// }
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///
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template <typename ValueT>
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class MIBundleOperandIteratorBase
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: public iterator_facade_base<MIBundleOperandIteratorBase<ValueT>,
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std::forward_iterator_tag, ValueT> {
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MachineBasicBlock::instr_iterator InstrI, InstrE;
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MachineInstr::mop_iterator OpI, OpE;
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// If the operands on InstrI are exhausted, advance InstrI to the next
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// bundled instruction with operands.
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void advance() {
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while (OpI == OpE) {
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// Don't advance off the basic block, or into a new bundle.
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if (++InstrI == InstrE || !InstrI->isInsideBundle()) {
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InstrI = InstrE;
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break;
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}
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OpI = InstrI->operands_begin();
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OpE = InstrI->operands_end();
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}
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}
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protected:
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/// MIBundleOperandIteratorBase - Create an iterator that visits all operands
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/// on MI, or all operands on every instruction in the bundle containing MI.
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///
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/// @param MI The instruction to examine.
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///
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explicit MIBundleOperandIteratorBase(MachineInstr &MI) {
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InstrI = getBundleStart(MI.getIterator());
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InstrE = MI.getParent()->instr_end();
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OpI = InstrI->operands_begin();
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OpE = InstrI->operands_end();
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advance();
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}
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/// Constructor for an iterator past the last iteration: both instruction
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/// iterators point to the end of the BB and OpI == OpE.
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explicit MIBundleOperandIteratorBase(MachineBasicBlock::instr_iterator InstrE,
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MachineInstr::mop_iterator OpE)
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: InstrI(InstrE), InstrE(InstrE), OpI(OpE), OpE(OpE) {}
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public:
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/// isValid - Returns true until all the operands have been visited.
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bool isValid() const { return OpI != OpE; }
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/// Preincrement. Move to the next operand.
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void operator++() {
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assert(isValid() && "Cannot advance MIOperands beyond the last operand");
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++OpI;
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advance();
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}
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ValueT &operator*() const { return *OpI; }
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ValueT *operator->() const { return &*OpI; }
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bool operator==(const MIBundleOperandIteratorBase &Arg) const {
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// Iterators are equal, if InstrI matches and either OpIs match or OpI ==
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// OpE match for both. The second condition allows us to construct an 'end'
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// iterator, without finding the last instruction in a bundle up-front.
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return InstrI == Arg.InstrI &&
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(OpI == Arg.OpI || (OpI == OpE && Arg.OpI == Arg.OpE));
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}
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/// getOperandNo - Returns the number of the current operand relative to its
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/// instruction.
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///
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unsigned getOperandNo() const {
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return OpI - InstrI->operands_begin();
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}
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};
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/// MIBundleOperands - Iterate over all operands in a bundle of machine
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/// instructions.
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///
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class MIBundleOperands : public MIBundleOperandIteratorBase<MachineOperand> {
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/// Constructor for an iterator past the last iteration.
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MIBundleOperands(MachineBasicBlock::instr_iterator InstrE,
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MachineInstr::mop_iterator OpE)
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: MIBundleOperandIteratorBase(InstrE, OpE) {}
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public:
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MIBundleOperands(MachineInstr &MI) : MIBundleOperandIteratorBase(MI) {}
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/// Returns an iterator past the last iteration.
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static MIBundleOperands end(const MachineBasicBlock &MBB) {
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return {const_cast<MachineBasicBlock &>(MBB).instr_end(),
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const_cast<MachineBasicBlock &>(MBB).instr_begin()->operands_end()};
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}
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};
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/// ConstMIBundleOperands - Iterate over all operands in a const bundle of
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/// machine instructions.
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///
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class ConstMIBundleOperands
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: public MIBundleOperandIteratorBase<const MachineOperand> {
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/// Constructor for an iterator past the last iteration.
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ConstMIBundleOperands(MachineBasicBlock::instr_iterator InstrE,
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MachineInstr::mop_iterator OpE)
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: MIBundleOperandIteratorBase(InstrE, OpE) {}
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public:
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ConstMIBundleOperands(const MachineInstr &MI)
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: MIBundleOperandIteratorBase(const_cast<MachineInstr &>(MI)) {}
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/// Returns an iterator past the last iteration.
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static ConstMIBundleOperands end(const MachineBasicBlock &MBB) {
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return {const_cast<MachineBasicBlock &>(MBB).instr_end(),
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const_cast<MachineBasicBlock &>(MBB).instr_begin()->operands_end()};
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}
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};
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inline iterator_range<ConstMIBundleOperands>
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const_mi_bundle_ops(const MachineInstr &MI) {
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return make_range(ConstMIBundleOperands(MI),
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ConstMIBundleOperands::end(*MI.getParent()));
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}
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inline iterator_range<MIBundleOperands> mi_bundle_ops(MachineInstr &MI) {
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return make_range(MIBundleOperands(MI),
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MIBundleOperands::end(*MI.getParent()));
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}
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/// VirtRegInfo - Information about a virtual register used by a set of
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/// operands.
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///
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struct VirtRegInfo {
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/// Reads - One of the operands read the virtual register. This does not
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/// include undef or internal use operands, see MO::readsReg().
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bool Reads;
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/// Writes - One of the operands writes the virtual register.
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bool Writes;
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/// Tied - Uses and defs must use the same register. This can be because of
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/// a two-address constraint, or there may be a partial redefinition of a
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/// sub-register.
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bool Tied;
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};
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/// AnalyzeVirtRegInBundle - Analyze how the current instruction or bundle uses
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/// a virtual register. This function should not be called after operator++(),
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/// it expects a fresh iterator.
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///
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/// @param Reg The virtual register to analyze.
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/// @param Ops When set, this vector will receive an (MI, OpNum) entry for
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/// each operand referring to Reg.
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/// @returns A filled-in RegInfo struct.
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VirtRegInfo AnalyzeVirtRegInBundle(
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MachineInstr &MI, Register Reg,
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SmallVectorImpl<std::pair<MachineInstr *, unsigned>> *Ops = nullptr);
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/// Return a pair of lane masks (reads, writes) indicating which lanes this
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/// instruction uses with Reg.
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std::pair<LaneBitmask, LaneBitmask>
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AnalyzeVirtRegLanesInBundle(const MachineInstr &MI, Register Reg,
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const MachineRegisterInfo &MRI,
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const TargetRegisterInfo &TRI);
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/// Information about how a physical register Reg is used by a set of
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/// operands.
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struct PhysRegInfo {
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/// There is a regmask operand indicating Reg is clobbered.
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/// \see MachineOperand::CreateRegMask().
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bool Clobbered;
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/// Reg or one of its aliases is defined. The definition may only cover
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/// parts of the register.
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bool Defined;
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/// Reg or a super-register is defined. The definition covers the full
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/// register.
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bool FullyDefined;
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/// Reg or one of its aliases is read. The register may only be read
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/// partially.
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bool Read;
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/// Reg or a super-register is read. The full register is read.
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bool FullyRead;
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/// Either:
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/// - Reg is FullyDefined and all defs of reg or an overlapping
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/// register are dead, or
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/// - Reg is completely dead because "defined" by a clobber.
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bool DeadDef;
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/// Reg is Defined and all defs of reg or an overlapping register are
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/// dead.
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bool PartialDeadDef;
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/// There is a use operand of reg or a super-register with kill flag set.
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bool Killed;
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};
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/// AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses
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/// a physical register. This function should not be called after operator++(),
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/// it expects a fresh iterator.
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///
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/// @param Reg The physical register to analyze.
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/// @returns A filled-in PhysRegInfo struct.
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PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg,
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const TargetRegisterInfo *TRI);
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} // End llvm namespace
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#endif
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