75bb30ddbf
The previous position of llvm.protected.field.ptr lowering for loads and stores was problematic as it not only inhibited optimizations such as DSE (as stores to a llvm.protected.field.ptr were not considered to must-alias stores to the non-protected.field pointer) but also required changes to other optimization passes to avoid transformations that would reduce PFP coverage. Address this by moving the load/store part of the lowering to InstCombine, where it will run earlier than the PFP-breaking and AA-relying transformations. The deactivation symbol, null comparison and EmuPAC parts of the lowering remain in PreISelLowering. Now that the transformation inhibitions are no longer needed, remove them (i.e. partially revert #151649, and revert #182976). This change resulted in a 2.4% reduction in Fleetbench .text size and the following improvements to PFP performance overhead for BM_PROTO_Arena on various microarchitectures: before after Apple M2 Ultra 3.5% 3.3% Google Axion C4A 3.3% 2.9% Google Axion N4A 2.7% 2.2% Reviewers: fmayer, nikic, vitalybuka Reviewed By: fmayer Pull Request: https://github.com/llvm/llvm-project/pull/186548
43 lines
1.7 KiB
LLVM
43 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5
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; RUN: opt -passes=pre-isel-intrinsic-lowering -mattr=+pauth -S < %s | FileCheck %s
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target triple = "aarch64-unknown-linux-gnu"
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@ds1 = external global i8
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@ds2 = external global i8
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;.
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; CHECK: @ds1 = external global i8
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; CHECK: @ds2 = hidden alias i8, inttoptr (i64 3573751839 to ptr)
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;.
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define i1 @compare(ptr addrspace(1) %ptrptr) {
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; CHECK-LABEL: define i1 @compare(
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; CHECK-SAME: ptr addrspace(1) [[PTRPTR:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[CMP1:%.*]] = icmp eq ptr addrspace(1) [[PTRPTR]], null
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; CHECK-NEXT: [[CMP2:%.*]] = icmp eq ptr addrspace(1) null, [[PTRPTR]]
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; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%protptrptr = call ptr addrspace(1) @llvm.protected.field.ptr.p1(ptr addrspace(1) %ptrptr, i64 3, i1 true) [ "deactivation-symbol"(ptr @ds1) ]
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%cmp1 = icmp eq ptr addrspace(1) %protptrptr, null
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%cmp2 = icmp eq ptr addrspace(1) null, %protptrptr
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%cmp = or i1 %cmp1, %cmp2
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ret i1 %cmp
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}
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define ptr addrspace(1) @escape(ptr addrspace(1) %ptrptr) {
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; CHECK-LABEL: define ptr addrspace(1) @escape(
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; CHECK-SAME: ptr addrspace(1) [[PTRPTR:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: ret ptr addrspace(1) [[PTRPTR]]
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;
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%protptrptr = call ptr addrspace(1) @llvm.protected.field.ptr.p1(ptr addrspace(1) %ptrptr, i64 3, i1 true) [ "deactivation-symbol"(ptr @ds2) ]
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ret ptr addrspace(1) %protptrptr
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}
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declare ptr addrspace(1) @llvm.protected.field.ptr.p1(ptr addrspace(1), i64, i1 immarg)
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;.
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; CHECK: attributes #[[ATTR0]] = { "target-features"="+pauth" }
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; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) "target-features"="+pauth" }
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;.
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