a42070a6aa
This adds support for lowering sibling calls with outgoing arguments. e.g ``` define void @foo(i32 %a) ``` Support is ported from AArch64ISelLowering's `isEligibleForTailCallOptimization`. The only thing that is missing is a full port of `TargetLowering::parametersInCSRMatch`. So, if we're using swiftself, we'll never tail call. - Rename `analyzeCallResult` to `analyzeArgInfo`, since the function is now used for both outgoing and incoming arguments - Teach `OutgoingArgHandler` about tail calls. Tail calls use frame indices for stack arguments. - Teach `lowerFormalArguments` to set the bytes in the caller's stack argument area. This is used later to check if the tail call's parameters will fit on the caller's stack. - Add `areCalleeOutgoingArgsTailCallable` to perform the eligibility check on the callee's outgoing arguments. For testing: - Update call-translator-tail-call to verify that we can now tail call with outgoing arguments, use G_FRAME_INDEX for stack arguments, and respect the size of the caller's stack - Remove GISel-specific check lines from speculation-hardening.ll, since GISel now tail calls like the other selectors - Add a GISel test line to tailcall-string-rvo.ll since we can tail call in that test now - Add a GISel test line to tailcall_misched_graph.ll since we tail call there now. Add specific check lines for GISel, since the debug output from the machine-scheduler differs with GlobalISel. The dependency still holds, but the output comes out in a different order. Differential Revision: https://reviews.llvm.org/D67471 llvm-svn: 371780
55 lines
2.3 KiB
LLVM
55 lines
2.3 KiB
LLVM
; RUN: llc -mcpu=cyclone -debug-only=machine-scheduler < %s 2>&1 | FileCheck %s --check-prefixes=COMMON,SDAG
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; RUN: llc -mcpu=cyclone -global-isel -debug-only=machine-scheduler < %s 2>&1 | FileCheck %s --check-prefixes=COMMON,GISEL
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; REQUIRES: asserts
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios7.0.0"
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define void @caller2(i8* %a0, i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9) {
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entry:
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tail call void @callee2(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a0)
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ret void
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}
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declare void @callee2(i8*, i8*, i8*, i8*, i8*,
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i8*, i8*, i8*, i8*, i8*)
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; Make sure there is a dependence between the load and store to the same stack
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; location during a tail call. Tail calls clobber the incoming argument area and
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; therefore it is not safe to assume argument locations are invariant.
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; PR23459 has a test case that we where miscompiling because of this at the
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; time.
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; COMMON: Frame Objects
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; COMMON: fi#-4: {{.*}} fixed, at location [SP+8]
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; COMMON: fi#-3: {{.*}} fixed, at location [SP]
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; COMMON: fi#-2: {{.*}} fixed, at location [SP+8]
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; COMMON: fi#-1: {{.*}} fixed, at location [SP]
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; The order that these appear in differes in GISel than SDAG, but the
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; dependency relationship still holds.
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; COMMON: [[VRA:%.*]]:gpr64 = LDRXui %fixed-stack.3
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; COMMON: [[VRB:%.*]]:gpr64 = LDRXui %fixed-stack.2
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; SDAG: STRXui %{{.*}}, %fixed-stack.0
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; SDAG: STRXui [[VRB]]{{[^,]*}}, %fixed-stack.1
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; GISEL: STRXui [[VRB]]{{[^,]*}}, %fixed-stack.1
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; GISEL: STRXui %{{.*}}, %fixed-stack.0
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; Make sure that there is an dependence edge between fi#-2 and fi#-4.
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; Without this edge the scheduler would be free to move the store accross the load.
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; COMMON: SU({{.*}}): [[VRB]]:gpr64 = LDRXui %fixed-stack.2
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; COMMON-NOT: SU
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; COMMON: Successors:
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; COMMON: SU([[DEPSTOREB:.*]]): Ord Latency=0
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; COMMON: SU([[DEPSTOREA:.*]]): Ord Latency=0
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; GlobalISel outputs DEPSTOREB before DEPSTOREA, but the dependency relationship
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; still holds.
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; SDAG: SU([[DEPSTOREA]]): STRXui %{{.*}}, %fixed-stack.0
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; SDAG: SU([[DEPSTOREB]]): STRXui %{{.*}}, %fixed-stack.1
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; GISEL: SU([[DEPSTOREB]]): STRXui %{{.*}}, %fixed-stack.0
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; GISEL: SU([[DEPSTOREA]]): STRXui %{{.*}}, %fixed-stack.1
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