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llvm-project/llvm/test/CodeGen
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Stanislav Mekhanoshin 76b7d3432e [AMDGPU] Add TII::isIgnorableUse() to allow VOP rematerialization 
Any def of EXEC prevents rematerialization of any VOP instruction
because of the physreg use. Create a callback to check if the
physreg use can be ingored to allow rematerialization.

Differential Revision: https://reviews.llvm.org/D105836
2021-07-14 13:03:58 -07:00
..
AArch64
[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs
2021-07-14 04:29:42 -07:00
AMDGPU
[AMDGPU] Add TII::isIgnorableUse() to allow VOP rematerialization
2021-07-14 13:03:58 -07:00
ARC
…
ARM
ARM: reuse existing libcall global variable if possible.
2021-07-14 14:14:47 +01:00
AVR
Place the BlockAddress type in the address space of the containing function
2021-07-02 12:17:55 +01:00
BPF
[InstCombine] Fold (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C, Idx, 0)) (PR50183) (REAPPLIED)
2021-07-14 12:21:01 +01:00
Generic
[llc] Default MCUseDwarfDirectory to true
2021-07-12 17:44:02 -07:00
Hexagon
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
Inputs
…
Lanai
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
M68k
[M68k][GloballSel] Lower outgoing return values in IRTranslator
2021-07-05 11:39:09 -07:00
Mips
Mips/GlobalISel: Use more standard call lowering infrastructure
2021-07-13 11:04:10 -04:00
MIR
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
MSP430
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
NVPTX
tests/CodeGen: Use %python lit substitution when invoking python
2021-07-06 18:46:36 -07:00
PowerPC
[AIX] Enable dollar sign as PC in inlineasm
2021-07-14 13:37:52 +00:00
RISCV
[RISCV] Fix the neutral element in vector 'fadd' reductions
2021-07-14 10:18:38 +01:00
SPARC
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
SystemZ
[SystemZ] Bugfix for the 'N' code for inline asm operand.
2021-07-12 15:04:08 +02:00
Thumb
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
Thumb2
[ARM] Move add(VMLALVA(A, X, Y), B) to VMLALVA(add(A, B), X, Y)
2021-07-14 20:06:49 +01:00
VE
[LegalizeTypes][VE] Don't Expand BITREVERSE/BSWAP during type legalization promotion if they will be promoted for NVT in op legalization.
2021-06-29 11:00:11 -07:00
WebAssembly
[WebAssembly] Codegen for v128.loadX_lane instructions
2021-07-14 11:31:53 -07:00
WinCFGuard
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
WinEH
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
X86
[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs
2021-07-14 04:29:42 -07:00
XCore
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00