76e14deb4a
BreakFalseDeps picks the best register for undef operands if instructions have false dependency. The problem is if the instruction is close to the beginning of the function, ReachingDefAnalysis is over optimism to the unused registers, which results in collision with registers just defined in the caller. This patch changes the selection of undef register in an reverse order, which reduces the probability of register collisions between caller and callee. It brings improvement in some of our internal benchmarks with negligible effect on other benchmarks.
436 lines
13 KiB
LLVM
436 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefixes=SSE2
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; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512
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define i1 @olt_ole_and_f32(float %w, float %x, float %y, float %z) {
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; SSE2-LABEL: olt_ole_and_f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: cmpless %xmm3, %xmm2
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; SSE2-NEXT: cmpltss %xmm1, %xmm0
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; SSE2-NEXT: andps %xmm2, %xmm0
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: # kill: def $al killed $al killed $eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: olt_ole_and_f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vcmpless %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vcmpltss %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vandps %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %eax
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; AVX1-NEXT: # kill: def $al killed $al killed $eax
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: olt_ole_and_f32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcmpless %xmm3, %xmm2, %k0
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; AVX512-NEXT: vcmpltss %xmm1, %xmm0, %k1
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; AVX512-NEXT: kandw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %eax
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; AVX512-NEXT: # kill: def $al killed $al killed $eax
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; AVX512-NEXT: retq
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%f1 = fcmp olt float %w, %x
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%f2 = fcmp ole float %y, %z
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%r = and i1 %f1, %f2
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ret i1 %r
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}
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define i1 @oge_oeq_or_f32(float %w, float %x, float %y, float %z) {
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; SSE2-LABEL: oge_oeq_or_f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: cmpeqss %xmm3, %xmm2
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; SSE2-NEXT: cmpless %xmm0, %xmm1
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; SSE2-NEXT: orps %xmm2, %xmm1
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; SSE2-NEXT: movd %xmm1, %eax
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; SSE2-NEXT: # kill: def $al killed $al killed $eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: oge_oeq_or_f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vcmpeqss %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vcmpless %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: vorps %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %eax
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; AVX1-NEXT: # kill: def $al killed $al killed $eax
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: oge_oeq_or_f32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcmpeqss %xmm3, %xmm2, %k0
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; AVX512-NEXT: vcmpless %xmm0, %xmm1, %k1
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; AVX512-NEXT: korw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %eax
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; AVX512-NEXT: # kill: def $al killed $al killed $eax
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; AVX512-NEXT: retq
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%f1 = fcmp oge float %w, %x
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%f2 = fcmp oeq float %y, %z
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%r = or i1 %f1, %f2
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ret i1 %r
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}
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define i1 @ord_one_xor_f32(float %w, float %x, float %y, float %z) {
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; SSE2-LABEL: ord_one_xor_f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: ucomiss %xmm1, %xmm0
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; SSE2-NEXT: setnp %cl
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; SSE2-NEXT: ucomiss %xmm3, %xmm2
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; SSE2-NEXT: setne %al
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; SSE2-NEXT: xorb %cl, %al
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: ord_one_xor_f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vcmpneq_oqss %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vcmpordss %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vxorps %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %eax
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; AVX1-NEXT: # kill: def $al killed $al killed $eax
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: ord_one_xor_f32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcmpneq_oqss %xmm3, %xmm2, %k0
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; AVX512-NEXT: vcmpordss %xmm1, %xmm0, %k1
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; AVX512-NEXT: kxorw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %eax
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; AVX512-NEXT: # kill: def $al killed $al killed $eax
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; AVX512-NEXT: retq
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%f1 = fcmp ord float %w, %x
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%f2 = fcmp one float %y, %z
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%r = xor i1 %f1, %f2
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ret i1 %r
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}
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; PR51068
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define i1 @une_oeq_xor_f32(float %w, float %x, float %y, float %z) {
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; SSE2-LABEL: une_oeq_xor_f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: cmpeqss %xmm3, %xmm2
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; SSE2-NEXT: cmpneqss %xmm1, %xmm0
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; SSE2-NEXT: xorps %xmm2, %xmm0
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: # kill: def $al killed $al killed $eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: une_oeq_xor_f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vcmpeqss %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vcmpneqss %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vxorps %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %eax
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; AVX1-NEXT: # kill: def $al killed $al killed $eax
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: une_oeq_xor_f32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcmpeqss %xmm3, %xmm2, %k0
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; AVX512-NEXT: vcmpneqss %xmm1, %xmm0, %k1
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; AVX512-NEXT: kxorw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %eax
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; AVX512-NEXT: # kill: def $al killed $al killed $eax
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; AVX512-NEXT: retq
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%f1 = fcmp une float %w, %x
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%f2 = fcmp oeq float %y, %z
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%r = xor i1 %f1, %f2
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ret i1 %r
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}
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define i1 @une_ugt_and_f64(double %w, double %x, double %y, double %z) {
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; SSE2-LABEL: une_ugt_and_f64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: cmpnlesd %xmm3, %xmm2
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; SSE2-NEXT: cmpneqsd %xmm1, %xmm0
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; SSE2-NEXT: andpd %xmm2, %xmm0
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: # kill: def $al killed $al killed $eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: une_ugt_and_f64:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vcmpnlesd %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vcmpneqsd %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vandpd %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %eax
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; AVX1-NEXT: # kill: def $al killed $al killed $eax
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: une_ugt_and_f64:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcmpnlesd %xmm3, %xmm2, %k0
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; AVX512-NEXT: vcmpneqsd %xmm1, %xmm0, %k1
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; AVX512-NEXT: kandw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %eax
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; AVX512-NEXT: # kill: def $al killed $al killed $eax
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; AVX512-NEXT: retq
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%f1 = fcmp une double %w, %x
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%f2 = fcmp ugt double %y, %z
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%r = and i1 %f1, %f2
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ret i1 %r
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}
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define i1 @ult_uge_or_f64(double %w, double %x, double %y, double %z) {
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; SSE2-LABEL: ult_uge_or_f64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: cmpnltsd %xmm3, %xmm2
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; SSE2-NEXT: cmpnlesd %xmm0, %xmm1
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; SSE2-NEXT: orpd %xmm2, %xmm1
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; SSE2-NEXT: movd %xmm1, %eax
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; SSE2-NEXT: # kill: def $al killed $al killed $eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: ult_uge_or_f64:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vcmpnltsd %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vcmpnlesd %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: vorpd %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %eax
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; AVX1-NEXT: # kill: def $al killed $al killed $eax
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: ult_uge_or_f64:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcmpnltsd %xmm3, %xmm2, %k0
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; AVX512-NEXT: vcmpnlesd %xmm0, %xmm1, %k1
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; AVX512-NEXT: korw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %eax
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; AVX512-NEXT: # kill: def $al killed $al killed $eax
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; AVX512-NEXT: retq
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%f1 = fcmp ult double %w, %x
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%f2 = fcmp uge double %y, %z
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%r = or i1 %f1, %f2
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ret i1 %r
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}
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define i1 @une_uno_xor_f64(double %w, double %x, double %y, double %z) {
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; SSE2-LABEL: une_uno_xor_f64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: cmpunordsd %xmm3, %xmm2
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; SSE2-NEXT: cmpneqsd %xmm1, %xmm0
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; SSE2-NEXT: xorpd %xmm2, %xmm0
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: # kill: def $al killed $al killed $eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: une_uno_xor_f64:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vcmpunordsd %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vcmpneqsd %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vxorpd %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %eax
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; AVX1-NEXT: # kill: def $al killed $al killed $eax
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: une_uno_xor_f64:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcmpunordsd %xmm3, %xmm2, %k0
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; AVX512-NEXT: vcmpneqsd %xmm1, %xmm0, %k1
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; AVX512-NEXT: kxorw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %eax
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; AVX512-NEXT: # kill: def $al killed $al killed $eax
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; AVX512-NEXT: retq
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%f1 = fcmp une double %w, %x
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%f2 = fcmp uno double %y, %z
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%r = xor i1 %f1, %f2
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ret i1 %r
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}
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; This uses ucomis because the types do not match.
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; TODO: Merge down to narrow type?
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define i1 @olt_olt_and_f32_f64(float %w, float %x, double %y, double %z) {
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; SSE2-LABEL: olt_olt_and_f32_f64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: ucomiss %xmm0, %xmm1
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; SSE2-NEXT: seta %cl
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; SSE2-NEXT: ucomisd %xmm2, %xmm3
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; SSE2-NEXT: seta %al
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; SSE2-NEXT: andb %cl, %al
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: olt_olt_and_f32_f64:
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; AVX: # %bb.0:
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; AVX-NEXT: vucomiss %xmm0, %xmm1
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; AVX-NEXT: seta %cl
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; AVX-NEXT: vucomisd %xmm2, %xmm3
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; AVX-NEXT: seta %al
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; AVX-NEXT: andb %cl, %al
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; AVX-NEXT: retq
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%f1 = fcmp olt float %w, %x
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%f2 = fcmp olt double %y, %z
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%r = and i1 %f1, %f2
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ret i1 %r
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}
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; This uses ucomis because of extra uses.
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define i1 @une_uno_xor_f64_use1(double %w, double %x, double %y, double %z, ptr %p) {
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; SSE2-LABEL: une_uno_xor_f64_use1:
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; SSE2: # %bb.0:
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; SSE2-NEXT: ucomisd %xmm1, %xmm0
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; SSE2-NEXT: setp %al
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; SSE2-NEXT: setne %cl
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; SSE2-NEXT: orb %al, %cl
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; SSE2-NEXT: movb %cl, (%rdi)
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; SSE2-NEXT: ucomisd %xmm3, %xmm2
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; SSE2-NEXT: setp %al
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; SSE2-NEXT: xorb %cl, %al
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: une_uno_xor_f64_use1:
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; AVX: # %bb.0:
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; AVX-NEXT: vucomisd %xmm1, %xmm0
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; AVX-NEXT: setp %al
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; AVX-NEXT: setne %cl
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; AVX-NEXT: orb %al, %cl
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; AVX-NEXT: movb %cl, (%rdi)
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; AVX-NEXT: vucomisd %xmm3, %xmm2
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; AVX-NEXT: setp %al
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; AVX-NEXT: xorb %cl, %al
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; AVX-NEXT: retq
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%f1 = fcmp une double %w, %x
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store i1 %f1, ptr %p
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%f2 = fcmp uno double %y, %z
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%r = xor i1 %f1, %f2
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ret i1 %r
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}
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; This uses ucomis because of extra uses.
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define i1 @une_uno_xor_f64_use2(double %w, double %x, double %y, double %z, ptr %p) {
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; SSE2-LABEL: une_uno_xor_f64_use2:
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; SSE2: # %bb.0:
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; SSE2-NEXT: ucomisd %xmm1, %xmm0
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; SSE2-NEXT: setp %al
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; SSE2-NEXT: setne %cl
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; SSE2-NEXT: orb %al, %cl
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; SSE2-NEXT: ucomisd %xmm3, %xmm2
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; SSE2-NEXT: setp %al
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; SSE2-NEXT: setp (%rdi)
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; SSE2-NEXT: xorb %cl, %al
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: une_uno_xor_f64_use2:
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; AVX: # %bb.0:
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; AVX-NEXT: vucomisd %xmm1, %xmm0
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; AVX-NEXT: setp %al
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; AVX-NEXT: setne %cl
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; AVX-NEXT: orb %al, %cl
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; AVX-NEXT: vucomisd %xmm3, %xmm2
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; AVX-NEXT: setp %al
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; AVX-NEXT: setp (%rdi)
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; AVX-NEXT: xorb %cl, %al
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; AVX-NEXT: retq
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%f1 = fcmp une double %w, %x
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%f2 = fcmp uno double %y, %z
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store i1 %f2, ptr %p
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%r = xor i1 %f1, %f2
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ret i1 %r
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}
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; bool f32cmp3(float x, float y, float z, float w) {
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; return ((x > 0) || (y > 0)) != (z < w);
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; }
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define i1 @f32cmp3(float %x, float %y, float %z, float %w) {
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; SSE2-LABEL: f32cmp3:
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; SSE2: # %bb.0:
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; SSE2-NEXT: xorps %xmm4, %xmm4
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; SSE2-NEXT: xorps %xmm5, %xmm5
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; SSE2-NEXT: cmpltss %xmm1, %xmm5
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; SSE2-NEXT: cmpltss %xmm0, %xmm4
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; SSE2-NEXT: orps %xmm5, %xmm4
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; SSE2-NEXT: movd %xmm4, %ecx
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; SSE2-NEXT: ucomiss %xmm2, %xmm3
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; SSE2-NEXT: seta %al
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; SSE2-NEXT: xorb %cl, %al
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: f32cmp3:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vxorps %xmm4, %xmm4, %xmm4
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; AVX1-NEXT: vcmpltss %xmm1, %xmm4, %xmm1
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; AVX1-NEXT: vcmpltss %xmm0, %xmm4, %xmm0
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; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vmovd %xmm0, %ecx
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; AVX1-NEXT: vucomiss %xmm2, %xmm3
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; AVX1-NEXT: seta %al
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; AVX1-NEXT: xorb %cl, %al
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: f32cmp3:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vxorps %xmm4, %xmm4, %xmm4
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; AVX512-NEXT: vcmpltss %xmm1, %xmm4, %k0
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; AVX512-NEXT: vcmpltss %xmm0, %xmm4, %k1
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; AVX512-NEXT: korw %k0, %k1, %k0
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; AVX512-NEXT: kmovw %k0, %ecx
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; AVX512-NEXT: vucomiss %xmm2, %xmm3
|
|
; AVX512-NEXT: seta %al
|
|
; AVX512-NEXT: xorb %cl, %al
|
|
; AVX512-NEXT: retq
|
|
%cmpx = fcmp ogt float %x, 0.0
|
|
%cmpy = fcmp ogt float %y, 0.0
|
|
%or = select i1 %cmpx, i1 true, i1 %cmpy
|
|
%cmpzw = fcmp olt float %z, %w
|
|
%r = xor i1 %or, %cmpzw
|
|
ret i1 %r
|
|
}
|
|
|
|
define i1 @PR140534(i32 %a0, i32 %a1, i32 %a2) {
|
|
; SSE2-LABEL: PR140534:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movl %edi, %eax
|
|
; SSE2-NEXT: cvtsi2sd %rax, %xmm0
|
|
; SSE2-NEXT: movl %esi, %eax
|
|
; SSE2-NEXT: cvtsi2sd %rax, %xmm1
|
|
; SSE2-NEXT: movl %edx, %eax
|
|
; SSE2-NEXT: cvtsi2sd %rax, %xmm2
|
|
; SSE2-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
|
|
; SSE2-NEXT: movapd %xmm1, %xmm3
|
|
; SSE2-NEXT: cmpltsd %xmm2, %xmm3
|
|
; SSE2-NEXT: cmpltsd %xmm0, %xmm1
|
|
; SSE2-NEXT: orpd %xmm3, %xmm1
|
|
; SSE2-NEXT: movd %xmm1, %eax
|
|
; SSE2-NEXT: # kill: def $al killed $al killed $eax
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: PR140534:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: movl %edi, %eax
|
|
; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm0
|
|
; AVX1-NEXT: movl %esi, %eax
|
|
; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm1
|
|
; AVX1-NEXT: movl %edx, %eax
|
|
; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm2
|
|
; AVX1-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
|
|
; AVX1-NEXT: vcmpltsd %xmm2, %xmm1, %xmm2
|
|
; AVX1-NEXT: vcmpltsd %xmm0, %xmm1, %xmm0
|
|
; AVX1-NEXT: vorpd %xmm2, %xmm0, %xmm0
|
|
; AVX1-NEXT: vmovd %xmm0, %eax
|
|
; AVX1-NEXT: # kill: def $al killed $al killed $eax
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: PR140534:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vcvtusi2sd %edi, %xmm15, %xmm0
|
|
; AVX512-NEXT: vcvtusi2sd %esi, %xmm15, %xmm1
|
|
; AVX512-NEXT: vcvtusi2sd %edx, %xmm15, %xmm2
|
|
; AVX512-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
|
|
; AVX512-NEXT: vcmpltsd %xmm2, %xmm1, %k0
|
|
; AVX512-NEXT: vcmpltsd %xmm0, %xmm1, %k1
|
|
; AVX512-NEXT: korw %k0, %k1, %k0
|
|
; AVX512-NEXT: kmovw %k0, %eax
|
|
; AVX512-NEXT: # kill: def $al killed $al killed $eax
|
|
; AVX512-NEXT: retq
|
|
%conv0 = uitofp i32 %a0 to double
|
|
%conv1 = uitofp i32 %a1 to double
|
|
%conv2 = uitofp i32 %a2 to double
|
|
%mul = fmul double %conv1, 0x3FF6A09E667F3BCD
|
|
%cmp0 = fcmp olt double %mul, %conv0
|
|
%cmp2 = fcmp olt double %mul, %conv2
|
|
%or = or i1 %cmp0, %cmp2
|
|
ret i1 %or
|
|
}
|