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llvm-project/llvm/test/CodeGen/MIR/AMDGPU
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Stanislav Mekhanoshin 8de4db697f [AMDGPU] Lower kernel LDS into a sorted structure 
Differential Revision: https://reviews.llvm.org/D102954
2021-05-25 11:29:29 -07:00
..
custom-pseudo-source-values.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
expected-target-index-name.mir
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intrinsics.mir
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invalid-frame-index2.mir
[AMDGPU] Serialize MFInfo::ScavengeFI
2021-05-07 11:15:25 +02:00
invalid-frame-index-invalid-fixed-stack.mir
[AMDGPU] Serialize MFInfo::ScavengeFI
2021-05-07 11:15:25 +02:00
invalid-frame-index-invalid-stack.mir
[AMDGPU] Serialize MFInfo::ScavengeFI
2021-05-07 11:15:25 +02:00
invalid-frame-index-no-stack.mir
[AMDGPU] Serialize MFInfo::ScavengeFI
2021-05-07 11:15:25 +02:00
invalid-frame-index.mir
[AMDGPU] Serialize MFInfo::ScavengeFI
2021-05-07 11:15:25 +02:00
invalid-target-index-operand.mir
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lit.local.cfg
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llc-target-cpu-attr-from-cmdline-ir.mir
Revert "Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access""
2020-11-11 14:40:14 +00:00
llc-target-cpu-attr-from-cmdline.mir
Revert "Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access""
2020-11-11 14:40:14 +00:00
load-store-opt-dlc.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
load-store-opt-scc.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
machine-function-info-after-pei.ll
[AMDGPU] Serialize MFInfo::ScavengeFI
2021-05-07 11:15:25 +02:00
machine-function-info-dynlds-align-invalid-case.mir
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machine-function-info-no-ir.mir
[AMDGPU] Serialize MFInfo::ScavengeFI
2021-05-07 11:15:25 +02:00
machine-function-info-register-parse-error1.mir
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machine-function-info-register-parse-error2.mir
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machine-function-info.ll
[AMDGPU] Lower kernel LDS into a sorted structure
2021-05-25 11:29:29 -07:00
mfi-frame-offset-reg-class.mir
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mfi-parse-error-frame-offset-reg.mir
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mfi-parse-error-scratch-rsrc-reg.mir
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mfi-parse-error-stack-ptr-offset-reg.mir
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mfi-scratch-rsrc-reg-reg-class.mir
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mfi-stack-ptr-offset-reg-class.mir
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mir-canon-multi.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
mircanon-memoperands.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
parse-order-reserved-regs.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
stack-id-assert.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
stack-id.mir
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subreg-def-is-not-ssa.mir
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syncscopes.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
target-flags.mir
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target-index-operands.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00