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llvm-project/llvm/lib/Target/AMDGPU
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Tom Stellard 6982bb8f25 AMDGPU/SI: Add support for 8-byte relocations 
Reviewers: arsenm, kzhuravl

Subscribers: wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25375

llvm-svn: 283593
2016-10-07 20:36:58 +00:00
..
AsmParser
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
2016-10-07 14:46:06 +00:00
Disassembler
[AMDGPU] Disassembler: print label names in branch instructions
2016-10-06 13:46:08 +00:00
InstPrinter
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
2016-10-07 14:46:06 +00:00
MCTargetDesc
AMDGPU/SI: Add support for 8-byte relocations
2016-10-07 20:36:58 +00:00
TargetInfo
…
Utils
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
2016-10-07 14:46:06 +00:00
AMDGPU.h
[AMDGPU] Pass optimization level to SelectionDAGISel
2016-10-03 18:47:26 +00:00
AMDGPU.td
[AMDGPU] Enable changing instprinter's behavior based on the per-function
2016-09-27 14:42:48 +00:00
AMDGPUAlwaysInlinePass.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDGPUAnnotateKernelFeatures.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDGPUAnnotateUniformValues.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDGPUAsmPrinter.cpp
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
2016-10-06 17:19:11 +00:00
AMDGPUAsmPrinter.h
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
2016-10-06 17:19:11 +00:00
AMDGPUCallingConv.td
…
AMDGPUCallLowering.cpp
GlobalISel: pass Function to lowerFormalArguments directly (NFC).
2016-09-21 12:57:35 +00:00
AMDGPUCallLowering.h
GlobalISel: pass Function to lowerFormalArguments directly (NFC).
2016-09-21 12:57:35 +00:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU] AMDGPUCodeGenPrepare: remove extra ';'
2016-10-07 14:39:53 +00:00
AMDGPUFrameLowering.cpp
MachineFunction: Return reference for getFrameInfo(); NFC
2016-07-28 18:40:00 +00:00
AMDGPUFrameLowering.h
…
AMDGPUInstrInfo.cpp
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
2016-10-07 14:46:06 +00:00
AMDGPUInstrInfo.h
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
2016-10-07 14:46:06 +00:00
AMDGPUInstrInfo.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
AMDGPUInstructions.td
Target: Remove unused patterns and transforms. NFC.
2016-10-07 00:30:49 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPU: Change fdiv lowering based on !fpmath metadata
2016-07-19 23:16:53 +00:00
AMDGPUIntrinsicInfo.h
AMDGPU: Change fdiv lowering based on !fpmath metadata
2016-07-19 23:16:53 +00:00
AMDGPUIntrinsics.td
AMDGPU: Remove read_workdim intrinsic
2016-07-25 20:17:02 +00:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Pass optimization level to SelectionDAGISel
2016-10-03 18:47:26 +00:00
AMDGPUISelLowering.cpp
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
2016-09-28 16:37:50 +00:00
AMDGPUISelLowering.h
AMDGPU: Refactor kernel argument lowering
2016-09-16 21:53:00 +00:00
AMDGPUMachineFunction.cpp
AMDGPU: Make AMDGPUMachineFunction fields private
2016-07-26 16:45:58 +00:00
AMDGPUMachineFunction.h
AMDGPU: Make AMDGPUMachineFunction fields private
2016-07-26 16:45:58 +00:00
AMDGPUMCInstLower.cpp
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
2016-10-06 17:19:11 +00:00
AMDGPUMCInstLower.h
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
2016-10-06 17:19:11 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDGPUPromoteAlloca.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDGPURegisterInfo.cpp
…
AMDGPURegisterInfo.h
…
AMDGPURegisterInfo.td
…
AMDGPURuntimeMetadata.h
AMDGPU: Add hidden kernel arguments to runtime metadata
2016-09-07 17:44:00 +00:00
AMDGPUSubtarget.cpp
AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size
2016-09-23 01:33:26 +00:00
AMDGPUSubtarget.h
[AMDGPU] Ask subtarget if waitcnt instruction is needed before barrier instruction
2016-09-30 16:50:36 +00:00
AMDGPUTargetMachine.cpp
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
AMDGPUTargetMachine.h
AMDGPU: Delete more dead code
2016-07-22 17:01:25 +00:00
AMDGPUTargetObjectFile.cpp
Move the Mangler from the AsmPrinter down to TLOF and clean up the
2016-09-16 07:33:15 +00:00
AMDGPUTargetObjectFile.h
Move the Mangler from the AsmPrinter down to TLOF and clean up the
2016-09-16 07:33:15 +00:00
AMDGPUTargetTransformInfo.cpp
Add new target hooks for LoadStoreVectorizer
2016-10-03 10:31:34 +00:00
AMDGPUTargetTransformInfo.h
Add new target hooks for LoadStoreVectorizer
2016-10-03 10:31:34 +00:00
AMDILCFGStructurizer.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDKernelCodeT.h
…
BUFInstructions.td
[AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.
2016-10-07 15:53:16 +00:00
CaymanInstructions.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
CIInstructions.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
CMakeLists.txt
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
2016-10-06 17:19:11 +00:00
DSInstructions.td
AMDGPU: Partially fix reported code size for some instructions
2016-10-06 10:13:23 +00:00
EvergreenInstructions.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
FLATInstructions.td
[AMDGPU] Refactor FLAT TD instructions
2016-09-05 11:22:51 +00:00
GCNHazardRecognizer.cpp
…
GCNHazardRecognizer.h
…
GCNSchedStrategy.cpp
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
GCNSchedStrategy.h
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
LLVMBuild.txt
…
MIMGInstructions.td
AMDGPU/SI: MIMG TD Refactoring.
2016-09-01 17:54:54 +00:00
Processors.td
AMDGPU : Add XNACK feature to GPUs that support it.
2016-09-06 19:55:17 +00:00
R600ClauseMergePass.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600ControlFlowFinalizer.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600ExpandSpecialInstrs.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600FrameLowering.cpp
…
R600FrameLowering.h
…
R600InstrFormats.td
AMDGPU/R600: Convert buffer id to VTX_READ input
2016-08-15 21:38:30 +00:00
R600InstrInfo.cpp
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
R600InstrInfo.h
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
R600Instructions.td
Target: Remove unused patterns and transforms. NFC.
2016-10-07 00:30:49 +00:00
R600Intrinsics.td
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
R600ISelLowering.cpp
AMDGPU: Refactor kernel argument lowering
2016-09-16 21:53:00 +00:00
R600ISelLowering.h
AMDGPU: Fix i1 fp_to_int
2016-07-22 17:01:21 +00:00
R600MachineFunctionInfo.cpp
AMDGPU: Delete more dead code
2016-07-22 17:01:25 +00:00
R600MachineFunctionInfo.h
AMDGPU: Delete more dead code
2016-07-22 17:01:25 +00:00
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600Packetizer.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R700Instructions.td
…
SIAnnotateControlFlow.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIDebuggerInsertNops.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIDefines.h
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
2016-10-07 14:46:06 +00:00
SIFixControlFlowLiveIntervals.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIFixSGPRCopies.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIFoldOperands.cpp
AMDGPU: Don't fold undef uses or copies with implicit uses
2016-10-06 18:12:13 +00:00
SIFrameLowering.cpp
AMDGPU/SI: Add support for triples with the mesa3d operating system
2016-09-16 21:34:26 +00:00
SIFrameLowering.h
AMDGPU: Refactor frame lowering
2016-08-31 21:52:21 +00:00
SIInsertSkips.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIInsertWaits.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIInstrFormats.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
SIInstrInfo.cpp
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
SIInstrInfo.h
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
SIInstrInfo.td
[AMDGPU] Disassembler: print label names in branch instructions
2016-10-06 13:46:08 +00:00
SIInstructions.td
AMDGPU: Remove scheduling info from si_mask_branch
2016-10-06 18:12:07 +00:00
SIIntrinsics.td
AMDGPU: Allow some control flow intrinsics to be CSEd
2016-09-16 22:11:18 +00:00
SIISelLowering.cpp
AMDGPU: Refactor indirect vector lowering
2016-10-04 01:41:05 +00:00
SIISelLowering.h
AMDGPU: Fix broken FrameIndex handling
2016-09-17 16:09:55 +00:00
SILoadStoreOptimizer.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SILowerControlFlow.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SILowerI1Copies.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIMachineFunctionInfo.cpp
AMDGPU/SI: Add support for triples with the mesa3d operating system
2016-09-16 21:34:26 +00:00
SIMachineFunctionInfo.h
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
SIMachineScheduler.cpp
AMDGPU/SI: Use a better method for determining the largest pressure sets
2016-08-26 21:16:37 +00:00
SIMachineScheduler.h
…
SIOptimizeExecMasking.cpp
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
2016-10-07 08:40:14 +00:00
SIRegisterInfo.cpp
AMDGPU: Do not re-use tmpreg in spill/restore lowering
2016-10-05 20:02:51 +00:00
SIRegisterInfo.h
AMDGPU: Factor SGPR spilling into separate functions
2016-10-04 01:14:56 +00:00
SIRegisterInfo.td
AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type.
2016-09-09 19:31:51 +00:00
SISchedule.td
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
SIShrinkInstructions.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SITypeRewriter.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIWholeQuadMode.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SMInstructions.td
[AMDGPU] Scalar Memory instructions TD refactoring
2016-09-01 09:56:47 +00:00
SOPInstructions.td
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
VIInstrFormats.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
VIInstructions.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
VOP1Instructions.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
VOP2Instructions.td
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
2016-10-07 14:46:06 +00:00
VOP3Instructions.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
VOPCInstructions.td
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
VOPInstructions.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00